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    NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
    2.
    发明申请
    NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF 有权
    非易失性存储器件及其操作方法

    公开(公告)号：US20150052294A1

    公开(公告)日：2015-02-19

    申请号：US14458771

    申请日：2014-08-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yongsung Cho ,  Ohsuk Kwon ,  Kihwan Choi

    IPC: G11C16/24 ,  G06F12/02 ,  G11C16/10 ,  G11C16/26 ,  G11C16/34

    CPC classification number: G11C16/24 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3459

    Abstract: An operating method of a nonvolatile memory device includes receiving a read command from a memory controller; determining a read mode based on the received read command, controlling a precharge time and an offset of a precharge control signal according to the determination result, and precharging a sensing bit line among bit lines to a precharge voltage based on the controlled precharge control signal. The sensing bit line is a bit line being precharged according to the determined read mode among the bit lines.

    Abstract translation: 非易失性存储器件的操作方法包括从存储器控制器接收读取命令; 基于接收到的读取命令确定读取模式，根据确定结果控制预充电控制信号的预充电时间和偏移量，以及基于受控的预充电控制信号将位线之间的感测位线预充电为预充电电压。 感测位线是根据位线中确定的读取模式预充电的位线。

    Nonvolatile memory devices and methods of programming nonvolatile memory devices
    4.
    发明授权
    Nonvolatile memory devices and methods of programming nonvolatile memory devices 有权
    非易失性存储器件和非易失性存储器件编程方法

    公开(公告)号：US09064582B2

    公开(公告)日：2015-06-23

    申请号：US14316023

    申请日：2014-06-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngsun Song ,  Bogeun Kim ,  Ohsuk Kwon ,  Kitae Park ,  Seung-Hwan Shin ,  Sangyong Yoon

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  G11C11/56 ,  G11C16/08

    CPC classification number: G11C16/10 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/34 ,  G11C16/3459

    Abstract: A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation.

    Abstract translation: 非易失性存储器件包括存储单元阵列，输出验证读取结果的页面缓冲器单元，产生参考电流信号的参考电流产生单元，根据验证读取结果输出电流的页面缓冲器解码单元。 非易失性存储装置还包括对电流进行计数的模拟比特计数单元，计算计数结果的累积和的数字加法单元，根据计算结果输出通过信号或失败信号的通过/失败检查单元， 以及控制程序操作的控制单元。

    Nonvolatile memory device and method of improving a program efficiency thereof
    6.
    发明授权
    Nonvolatile memory device and method of improving a program efficiency thereof 有权
    非易失性存储器件和提高其程序效率的方法

    公开(公告)号：US08958251B2

    公开(公告)日：2015-02-17

    申请号：US13913710

    申请日：2013-06-10

    Applicant: Samsung Electronics Co., Ltd

    Inventor： Ohsuk Kwon ,  Sang-Hyun Joo ,  HyeongJun Kim ,  Kitae Park ,  Seung-Hwan Shin

    IPC: G11C16/06 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34

    CPC classification number: G11C16/10 ,  G11C16/24 ,  G11C16/3459

    Abstract: A nonvolatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit connected with the memory cell array via a plurality of bit lines and configured to selectively pre-charge the plurality of bit lines, and control logic configured to control the page buffer circuit such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a first time at a read operation and such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a second time different from the first time at a verification read operation. The second time is determined on the basis of the number of selected bit lines of the plurality of bit lines at the verification read operation.

    Abstract translation: 非易失性存储器件包括包括多个存储器单元的存储单元阵列，经由多个位线与存储单元阵列连接并被配置为选择性地预充电多个位线的页缓冲器电路，以及配置为 控制页面缓冲器电路，使得在读取操作的第一时间期间将预充电电压施加到多个位线的选定位线，并且使得预充电电压被施加到多个位线中的选定位线 在第二时间不同于在验证读取操作的第一时间的位线。 基于在验证读取操作中的多个位线的选定位线的数量来确定第二次。

    Nonvolatile memory device, storage device having the same, operating method thereof
    7.
    发明授权
    Nonvolatile memory device, storage device having the same, operating method thereof 有权
    非易失性存储装置，具有其的存储装置，其操作方法

    公开(公告)号：US09570176B2

    公开(公告)日：2017-02-14

    申请号：US14668544

    申请日：2015-03-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Won-Taeck Jung ,  Tae-Hong Kwon ,  Tae-Min Park ,  Ohsuk Kwon

    IPC: G11C11/34 ,  G11C16/10 ,  G11C16/26 ,  G11C7/04 ,  G11C8/12 ,  G11C16/08

    CPC classification number: G11C16/10 ,  G11C7/04 ,  G11C8/12 ,  G11C16/08 ,  G11C16/26

    Abstract: An operating method of a nonvolatile memory device includes determining whether a memory block is a selected block, and when the memory block is not the selected block, determining whether the memory block shares a block word line with the selected block. The method further includes applying an unselected block word line voltage to word lines of the memory block when the memory block shares the block word line with the selected block, and floating the word lines of the memory block when the memory block does not share the block word line with the selected block.

    Abstract translation: 非易失性存储器件的操作方法包括确定存储器块是否是所选择的块，以及当存储器块不是所选择的块时，确定存储器块是否与所选择的块共享块字线。 该方法还包括当存储器块与所选择的块共享块字线时将未选择的块字线电压施加到存储器块的字线，并且当存储器块不共享块时浮置存储器块的字线 字线与所选块。

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