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    Semiconductor devices having through-substrate via plugs and semiconductor packages including the same
    1.
    发明授权
    Semiconductor devices having through-substrate via plugs and semiconductor packages including the same 有权
    具有通过插塞的贯通基板的半导体器件和包括该半导体封装的半导体封装

    公开(公告)号：US09230897B2

    公开(公告)日：2016-01-05

    申请号：US14324386

    申请日：2014-07-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Young-Bae Kim

    IPC: H01L23/498 ,  H01L23/522 ,  H01L23/538

    CPC classification number: H01L23/49816 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5384 ,  H01L25/0657 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00

    Abstract: Provided is a semiconductor package including a package substrate having lands, a first semiconductor device mounted on the package substrate and having a bottom surface on which first lines are disposed, and solder balls respectively electrically connected to the lands of the package substrate with the first lines of the first semiconductor device. The first semiconductor device includes a first substrate, and through-substrate via (TSV) plugs that vertically pass through the first substrate. The TSV plugs are respectively vertically aligned with the first lines, overlap first regions corresponding to 70% or less of diameters of the solder balls from central axes of the solder balls, and do not overlap second regions corresponding to the remaining 30% or more of diameters of the solder balls from the central axes of the solder balls. Adjacent ones of the TSV plugs are arranged at irregular intervals with respect to each other.

    Abstract translation: 提供了一种半导体封装，其包括具有焊盘的封装基板，安装在封装基板上的第一半导体器件，并且具有设置有第一线的底面，以及分别与第一线路与封装基板的焊盘电连接的焊球 的第一半导体器件。 第一半导体器件包括第一衬底和垂直穿过第一衬底的贯通衬底通孔（TSV）插头。 TSV插头分别与第一线垂直对准，与焊球的中心轴对应于焊球直径的70％或更小的第一区域重叠，并且不重叠对应于剩余的30％或更多 焊球从焊球的中心轴线的直径。 相邻的TSV插头相对于彼此以不规则的间隔排列。

    Semiconductor memory device having three-dimensional cross point array
    7.
    发明授权
    Semiconductor memory device having three-dimensional cross point array 有权
    具有三维交叉点阵列的半导体存储器件

    公开(公告)号：US09184218B2

    公开(公告)日：2015-11-10

    申请号：US14506005

    申请日：2014-10-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Lijie Zhang ,  Young-Bae Kim ,  Youn-Seon Kang ,  In-Gyu Baek ,  Masayuki Terai

    IPC: H01L27/24 ,  H01L45/00

    CPC classification number: H01L27/249 ,  H01L27/2454 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

    Abstract: A semiconductor memory device includes pillars extending upright on a substrate in a direction perpendicular to the substrate, a stack disposed on the substrate and constituted by a first interlayer insulating layer, a first conductive layer, a second interlayer insulating layer, and a second conductive layer, a variable resistance layer interposed between the pillars and the first conductive layer, and an insulating layer interposed between the first pillars and the second conductive layer.

    Abstract translation: 半导体存储器件包括在垂直于衬底的方向上在衬底上直立延伸的柱，设置在衬底上并由第一层间绝缘层，第一导电层，第二层间绝缘层和第二导电层 插入在所述柱和所述第一导电层之间的可变电阻层以及插在所述第一柱和所述第二导电层之间的绝缘层。

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