公开(公告)号：US11543871B2

公开(公告)日：2023-01-03

申请号：US17239654

申请日：2021-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Hyuk Lee ,  Seunghyun Choi

IPC: G06F1/3206 ,  G06F1/28

Abstract: A storage device includes a solid state drive (SSD), a field programmable gate array (FPGA), a power sensor and a global controller. The SSD stores data and receives power through a power rail connected to a host device. The FPGA processes data read from the SSD or data to be stored in the SSD and receives power through the power rail. The power sensor is connected to the power rail and generates a measured power value corresponding to a total power consumed by the SSD and the FPGA by measuring the total power. The global controller determines one of the SSD and the FPGA as a priority component operating with a fixed performance and determines the other of the SSD and the FPGA as a non-priority component operating with a variable performance in a priority mode based on power control information provided from the host device.

公开(公告)号：US11868626B2

公开(公告)日：2024-01-09

申请号：US17939393

申请日：2022-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Doogie Lee

IPC: G06F3/08 ,  H03M13/00 ,  G06F3/06 ,  G06F13/16 ,  G11C16/10

CPC classification number: G06F3/0629 ,  G06F3/0604 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0673 ,  G06F13/1689 ,  G06F3/08 ,  G09G2360/125 ,  G09G2360/126 ,  G11C16/10 ,  H03M13/6563

Abstract: A storage device set is provided. The storage device set includes a reconfigurable logic chip and a storage device. The logic chip includes a retimer configured to generate an output signal by adjusting an input signal received from an external device; and an operation circuit configured to perform an operation function. The storage device includes: a first port connected to the retimer; a second port connected to the operation circuit; and a controller configured to control data transmission and reception via the first port and the second port.

公开(公告)号：US20230215698A1

公开(公告)日：2023-07-06

申请号：US17865675

申请日：2022-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inhwa Baek ,  Donggap Shin ,  Yongin Lee ,  Se-Hoon Jang ,  Youngho Kim ,  Ho Kim ,  Seungdae Seok ,  Siwoong Woo

IPC: H01J37/32 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01J37/3244 ,  H01J37/32862 ,  H01L21/67201 ,  H01J37/32532 ,  H01L21/67051 ,  H01L21/6833

Abstract: Plasma processing apparatuses, substrate bonding systems, and substrate bonding methods are provided. The plasma processing apparatus includes a plasma process chamber that includes a process space, a load-lock chamber connected to the process space, a first vacuum pump that adjusts a pressure of the load-lock chamber, a process gas supply that supplies the process space with a process gas, and an H2O supply that supplies the process space with H2O. The plasma process chamber includes a chuck that supports a substrate and a plasma electrode to which a radio-frequency (RF) power is applied.

公开(公告)号：US10784130B2

公开(公告)日：2020-09-22

申请号：US15838713

申请日：2017-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-Ha Lee ,  Sang-Yoon Kim ,  YoungBum Kim ,  Hui-Jae Kim ,  SeungDae Seok ,  Jaebong Shin ,  Byungjoon Lee ,  Yongin Lee ,  Jaeyeon Pyo

IPC: H01L21/67 ,  H01L21/68 ,  H01L27/148 ,  H01L21/683

Abstract: A bonding apparatus includes a stage supporting a substrate, a first bonding head at a first side of the stage, the first bonding head to pick up a first chip and to bond the picked-up first chip onto the substrate, a second bonding head at a second side of the stage, the second bonding head to pick up a second chip and to bond the picked-up second chip onto the substrate, and a first image acquisition unit over a movement path of the stage to acquire an image of the stage.

公开(公告)号：US11971764B2

公开(公告)日：2024-04-30

申请号：US18074615

申请日：2022-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Hyuk Lee ,  Seunghyun Choi

IPC: G06F1/3206 ,  G06F1/28

CPC classification number: G06F1/3206 ,  G06F1/28

Abstract: A storage device includes a solid state drive (SSD), a field programmable gate array (FPGA), a power sensor and a global controller. The SSD stores data and receives power through a power rail connected to a host device. The FPGA processes data read from the SSD or data to be stored in the SSD and receives power through the power rail. The power sensor is connected to the power rail and generates a measured power value corresponding to a total power consumed by the SSD and the FPGA by measuring the total power. The global controller determines one of the SSD and the FPGA as a priority component operating with a fixed performance and determines the other of the SSD and the FPGA as a non-priority component operating with a variable performance in a priority mode based on power control information provided from the host device.

公开(公告)号：US11474714B2

公开(公告)日：2022-10-18

申请号：US16941070

申请日：2020-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongin Lee ,  Doogie Lee

IPC: G06F3/06 ,  G06F13/16

Abstract: A storage device set is provided. The storage device set includes a reconfigurable logic chip and a storage device. The logic chip includes a retimer configured to generate an output signal by adjusting an input signal received from an external device; and an operation circuit configured to perform an operation function. The storage device includes: a first port connected to the retimer; a second port connected to the operation circuit; and a controller configured to control data transmission and reception via the first port and the second port.