公开(公告)号：US20020115271A1

公开(公告)日：2002-08-22

申请号：US10074050

申请日：2002-02-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC: H01L021/36

CPC classification number: H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/3221 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675 ,  H01L29/78678

Abstract: It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600null C.) and the employment of lower temperature processes (600null C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.

Abstract translation: 旨在实现在高温（至少600℃）下进行的热处理和使用较低温度工艺（600℃或更低）的热处理数量的减少，并且实现步骤简化和生产量提高。 在本发明中，在第一半导体膜（104）上形成有阻挡层（105），第二半导体膜（106）和含有赋予一种导电类型的杂质元素（磷）的第三半导体层（108） 具有晶体结构。 进行吸收，其中包含在第一半导体膜（104）中的金属元素被允许通过热处理通过阻挡层（105）和第二半导体膜（106）以移动到第三半导体膜（107） ）。 之后，第二和第三半导体膜（106）和（107）被用作蚀刻停止层的阻挡层（105）去除。

公开(公告)号：US20040238124A1

公开(公告)日：2004-12-02

申请号：US10807472

申请日：2004-03-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Osamu Nakamura

IPC: C23F001/00

CPC classification number: C23C16/45595 ,  C23C16/515 ,  C23C16/54 ,  H01J37/32009 ,  H01J37/32366 ,  H01J37/32541

Abstract: In the case of generating plasma under atmospheric pressure, the particle generated due to generation of high-density plasma is to be a cause of a defect such as a point defect or a line defect of a display portion in a display device. The present invention is offered in view of the above situation, and provides a plasma treatment apparatus for suppressing generation of a particle. According to the present invention, plasma is generated in a limited minimum region to be treated by a plasma treatment over a substrate to be treated. Generation of a particle is suppressed to a minimum by providing a plurality of plasma generation units generating minimum plasma having a similar size as the limited minimum region, changing a relative position of the plurality of plasma generation units and the substrate to be treated, and performing a plasma treatment to a limited predetermined region.

Abstract translation: 在大气压下产生等离子体的情况下，由于产生高密度等离子体而产生的粒子将成为显示装置中显示部的点缺陷或线缺陷等缺陷的原因。 鉴于上述情况提供本发明，并且提供了一种用于抑制颗粒产生的等离子体处理装置。 根据本发明，通过在待处理的基板上进行等离子体处理，在有限的最小区域中产生等离子体。 通过提供多个等离子体产生单元来产生颗粒的产生，产生具有与限制的最小区域相似尺寸的最小等离子体，改变多个等离子体产生单元和待处理的基板的相对位置，并执行 等离子体处理到有限的预定区域。

公开(公告)号：US20020125480A1

公开(公告)日：2002-09-12

申请号：US10066542

申请日：2002-02-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

IPC: H01L029/76

CPC classification number: H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  Y10S257/913

Abstract: The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.

Abstract translation: TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。 本发明提供了减少电特性偏差的TFT及其制造方法。 本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。 如图所示。 如图1所示，后气体元件至少包含在通道区域的上层中。

公开(公告)号：US20040222425A1

公开(公告)日：2004-11-11

申请号：US10867515

申请日：2004-06-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takashi Hamada ,  Satoshi Murakami ,  Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Toru Takayama

IPC: H01L029/04

CPC classification number: H01L21/02672 ,  G02F1/13454 ,  H01L21/2022 ,  H01L21/3226 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1277 ,  H01L27/1288 ,  H01L27/3246 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L51/5253 ,  H01L51/56

Abstract: The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semiconductor film to the semiconductor film containing a rare gas element by a heat treatment. Furthermore, a first impurity region and a second impurity region formed in a semiconductor layer of a first n-channel TFT are provided outside a gate electrode. A third impurity region formed in a semiconductor layer of a second n-channel TFT is provided so as to be partially overlapped with a gate electrode. A third impurity region is provided outside a gate electrode. A fourth impurity region formed in a semiconductor layer of a p-channel TFT is provided so as to be partially overlapped with a gate electrode. A fifth impurity region is provided outside a gate electrode.

Abstract translation: 本发明的特征在于，在通过阻挡层使用催化元件而获得的结晶半导体膜上形成含有稀有气体元素的半导体膜，催化元素从结晶半导体膜移动到含有 稀有气体元素通过热处理。 此外，形成在第一n沟道TFT的半导体层中的第一杂质区域和第二杂质区域设置在栅电极的外侧。 形成在第二n沟道TFT的半导体层中的第三杂质区域设置成与栅电极部分重叠。 第三杂质区域设置在栅极外部。 形成在p沟道TFT的半导体层中的第四杂质区域设置成与栅电极部分重叠。 第五杂质区域设置在栅极外部。

公开(公告)号：US20040263564A1

公开(公告)日：2004-12-30

申请号：US10879800

申请日：2004-06-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinji Maekawa ,  Osamu Nakamura ,  Keitaro Imai

IPC: B41J002/145

CPC classification number: B41J2/2125 ,  B41J2/1433 ,  B41J2/145 ,  B41J2002/14475 ,  H05K3/1241

Abstract: The present invention provides a method of manufacturing a pattern with a flattened surface and a droplet jetting device which can provides the pattern with a flattened surface. A droplet jetting means of the present invention comprises a droplet jetting means having a plurality of nozzles arranged in each row, each of the plurality of nozzles has a plurality of discharge ports aligned in an axial direction, and diameters of the discharge ports for the plurality of nozzles differ from row to row. According to one aspect of the present invention, a droplet jetting means including a plurality of nozzles arranged in two rows with a plurality of discharge ports aligned in an axial direction in each row, comprising steps of: forming a first pattern by jetting a composition through the plurality of nozzles in the first row; and forming a second pattern by selectively jetting the composition through the plurality of nozzles in the second row, wherein discharge rates the composition jetted from each of the plurality of nozzles aligned in the first row and the second row differ from each other.

Abstract translation: 本发明提供一种制造具有平坦表面的图案的方法和能够为图案提供扁平表面的液滴喷射装置。 本发明的液滴喷射装置包括具有布置在每排中的多个喷嘴的液滴喷射装置，多个喷嘴中的每一个喷嘴具有沿轴向排列的多个排出口，并且用于多个喷嘴的排出口的直径 的喷嘴不同。 根据本发明的一个方面，一种液滴喷射装置，包括排列成两排的多个喷嘴，多个排出口在每一排沿轴向排列，包括以下步骤：通过喷射组合物形成第一图案 第一排中的多个喷嘴; 并且通过选择性地喷射组合物通过第二排中的多个喷嘴形成第二图案，其中从在第一排和第二排中排列的多个喷嘴中的每一个喷射出的组合物的喷射速率彼此不同。

公开(公告)号：US20040259387A1

公开(公告)日：2004-12-23

申请号：US10700516

申请日：2003-11-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Osamu Nakamura ,  Hironobu Shoji ,  Koichiro Tanaka

IPC: H01L021/00 ,  H01L021/324 ,  H01L021/477 ,  H01L021/84

CPC classification number: H01L21/02683 ,  B23K26/0604 ,  B23K26/0608 ,  B23K26/064 ,  B23K26/0643 ,  B23K26/0648 ,  B23K26/0665 ,  B23K26/12 ,  B23K26/123 ,  B23K26/127 ,  H01L21/2026 ,  H01L21/268 ,  H01L29/66757

Abstract: According to the present invention, oxygen and nitrogen are effectively prevented from mixing into the semiconductor film by doping Ar or the like in the semiconductor film in advance, and by irradiating the laser light in the atmosphere of Ar or the like. Therefore, the variation of the impurity concentration due to the fluctuation of the energy density can be suppressed and the variation of the mobility of the semiconductor film can be also suppressed. Moreover, in TFT formed with the semiconductor film, the variation of the on-current in addition to the mobility can be also suppressed. Furthermore, in the present invention, the first laser light converted into the harmonic easily absorbed in the semiconductor film is irradiated to melt the semiconductor film and to increase the absorption coefficient of the fundamental wave.

Abstract translation: 根据本发明，通过预先在半导体膜中掺杂Ar等，并且通过在Ar等的气氛中照射激光，有效地防止了氧和氮混入半导体膜。 因此，可以抑制由于能量密度的波动引起的杂质浓度的变化，并且还可以抑制半导体膜的迁移率的变化。 此外，在由半导体膜形成的TFT中，还可以抑制导通电流的变化，同时也抑制迁移率。 此外，在本发明中，照射转换为在半导体膜中容易吸收的谐波的第一激光以熔化半导体膜并增加基波的吸收系数。

公开(公告)号：US20040214411A1

公开(公告)日：2004-10-28

申请号：US10701174

申请日：2003-11-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Osamu Nakamura ,  Hironobu Shoji

IPC: C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L21/02686 ,  C30B1/023 ,  C30B1/08 ,  C30B29/06 ,  H01L21/02683 ,  H01L21/2026

Abstract: It is an object of the present invention to provide a laser irradiation apparatus being able to crystallize the semiconductor film homogeneously while suppressing the variation of the crystallinity in the semiconductor film and the unevenness of the state of the surface thereof. It is another object of the present invention to provide a method for manufacturing a semiconductor device using the laser irradiation apparatus which can suppress the variation of on-current, mobility, and threshold of TFT, and to further provide a semiconductor device manufactured with the manufacturing method. A method for manufacturing a semiconductor device comprising the steps of adding the first noble gas to the semiconductor film formed over the insulating surface with the ion doping method and irradiating the semiconductor film with the first noble gas added therein with the laser light in an atmosphere of second noble gas, wherein the magnetic field is applied to the semiconductor film with the first noble gas added when the laser light is irradiated.

Abstract translation: 本发明的目的是提供一种激光照射装置，其能够在抑制半导体膜中的结晶性的变化和其表面状态的不均匀性的同时使半导体膜均匀结晶。 本发明的另一个目的是提供一种使用能够抑制TFT的导通电流，迁移率和阈值的变化的激光照射装置的半导体器件的制造方法，并且进一步提供利用制造制造的半导体器件 方法。 一种制造半导体器件的方法，包括以下步骤：用离子掺杂方法将第一稀有气体添加到形成在绝缘表面上的半导体膜上，并且在其中加入第一稀有气体的激光照射半导体膜， 第二惰性气体，其中当照射激光时，在加入了第一稀有气体的情况下将磁场施加到半导体膜。

公开(公告)号：US20040005745A1

公开(公告)日：2004-01-08

申请号：US10610755

申请日：2003-07-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Osamu Nakamura

IPC: H01L021/338

CPC classification number: H01L21/67253 ,  H01J2237/31701 ,  H01L21/26513 ,  H01L21/2658 ,  Y10S438/918

Abstract: A doping method capable of controlling a dose amount in response to a change the ratio in ion species during a doping process, a control system for controlling a doping amount, and a doping apparatus having a control system are provided. An ion current value of a specific ion in an ion beam is measured. There is an ion detector that measures an ion current value of a specific ion in an ion beam and enters the obtained monitor signal into a control means. Set data for setting a predetermined dose amount is entered into the control means, convert data for obtaining an actual dose amount from the monitor signal is entered into the control means by a memory means. The control means performs data processing on the basis of the input monitor signal and the convert data, a control signal for obtaining the predetermined dose amount is entered from the control means to the dose amount control system to dope the controlled ion beam into the target material.

Abstract translation: 提供了能够响应于在掺杂过程期间离子种类的比率的变化来控制剂量的掺杂方法，用于控制掺杂量的控制系统和具有控制系统的掺杂装置。 测量离子束中特定离子的离子电流值。 存在离子检测器，其测量离子束中的特定离子的离子电流值，并将获得的监视信号输入到控制装置中。 将用于设定预定剂量的设定数据输入到控制装置中，通过存储装置将用于从监视信号获得实际剂量的数据转换为控制装置。 控制装置基于输入监视信号和转换数据执行数据处理，从控制装置输入用于获得预定剂量的控制信号到剂量控制系统以将受控离子束掺杂到目标材料中 。

公开(公告)号：US20030184235A1

公开(公告)日：2003-10-02

申请号：US10390882

申请日：2003-03-19

Applicant: Semiconductor Energy Laboratory Co., Ltd

Inventor： Osamu Nakamura

IPC: H01J007/24

CPC classification number: B82Y10/00 ,  H01J37/32009 ,  H01J37/3255

Abstract: An object of the present invention is to provide an apparatus for producing stable plasma. Another object of the present invention is to provide an apparatus having a long-lasting cathode electrode which is superior in field emission characteristic since the plasma density has to be raised in order to increase the throughput. The structure of the plasma producing apparatus of the present invention relates to a plasma producing apparatus with a plasma chamber surrounded by walls to make material gas into plasma, characterized in the plasma chamber has a cathode electrode, an anode electrode, means for introducing the material gas, and exhaust means, and that a carbon nano tube is formed on a surface of the cathode electrode and the anode electrode is formed on the surface of the cathode electrode.

Abstract translation: 本发明的目的是提供一种用于制造稳定等离子体的装置。 本发明的另一个目的是提供一种具有持久的阴极电极的装置，由于必须提高等离子体密度以提高生产量，因此场致发射特性优异。 本发明的等离子体制造装置的结构涉及一种等离子体制造装置，其具有由壁围绕的等离子体室，以使原料气体进入等离子体，其特征在于，等离子体室具有阴极电极，阳极电极，用于引入材料的装置 气体和排气装置，并且在阴极电极的表面上形成碳纳米管，并且在阴极电极的表面上形成阳极电极。

公开(公告)号：US20020151120A1

公开(公告)日：2002-10-17

申请号：US10072931

申请日：2002-02-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Koji Dairiki ,  Toru Mitsuki ,  Toru Takayama ,  Hideto Ohnuma ,  Taketomi Asami ,  Mitsuhiro Ichijo

IPC: H01L021/00 ,  H01L021/84

CPC classification number: H01L29/66757 ,  G02F1/13454 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78675 ,  H01L29/78678

Abstract: An object is to reduce the number of high temperature (equal to or greater than 600null C.) heat treatment process steps and achieve lower temperature (equal to or less than 600null C.) processes, and to simplify the process steps and increase throughput in a method of manufacturing a semiconductor device. With the present invention, a barrier layer, a second semiconductor film, and a third semiconductor film containing an inert gas element are formed on a first semiconductor film having a crystalline structure. Gettering is performed and a metallic element contained in the first semiconductor film passes through the barrier layer and the second semiconductor film by a heat treatment process, and moves to the third semiconductor film. The second semiconductor film and the third semiconductor film are then removed, with the barrier layer used as an etching stopper.

Abstract translation: 目的是减少高温（等于或大于600℃）的热处理工艺步骤，并实现更低的温度（等于或小于600℃）的工艺，并简化工艺步骤并提高生产量 一种制造半导体器件的方法。 利用本发明，在具有晶体结构的第一半导体膜上形成阻挡层，第二半导体膜和含有惰性气体元件的第三半导体膜。 进行吸气，并且包含在第一半导体膜中的金属元素通过热处理工艺通过阻挡层和第二半导体膜，并移动到第三半导体膜。 然后去除第二半导体膜和第三半导体膜，其中阻挡层用作蚀刻停止层