公开(公告)号：US20140016407A1

公开(公告)日：2014-01-16

申请号：US14024769

申请日：2013-09-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine ,  Kiyoshi Kato

IPC: G11C11/40

CPC classification number: G11C11/40 ,  G11C5/063 ,  G11C5/147 ,  G11C7/00 ,  G11C11/405 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0033 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2211/4016 ,  G11C2213/79

Abstract: A semiconductor device with a novel structure is provided, in which the operation voltage is reduced or the storage capacity is increased by reducing variation in the threshold voltages of memory cells after writing. The semiconductor device includes a plurality of memory cells each including a transistor including an oxide semiconductor and a transistor including a material other than an oxide semiconductor, a driver circuit that drives the plurality of memory cells, and a potential generating circuit that generates a plurality of potentials supplied to the driver circuit. The driver circuit includes a data buffer, a writing circuit that writes one potential of the plurality of potentials into each of the plurality of memory cells as data, a reading circuit that reads the data written into the memory cells, and a verifying circuit that verifies whether the read data agrees with data held in the data buffer or not.

Abstract translation: 提供了一种具有新颖结构的半导体器件，其中通过减少写入之后存储器单元的阈值电压的变化来降低操作电压或者增加存储容量。 半导体器件包括多个存储单元，每个存储单元包括包括氧化物半导体的晶体管和包括除氧化物半导体之外的材料的晶体管，驱动多个存储单元的驱动电路，以及产生多个存储单元的电位产生电路 提供给驱动电路的电位。 驱动器电路包括数据缓冲器，将多个电位中的一个电位写入作为数据的多个存储单元中的每一个的写入电路，读取写入存储单元的数据的读取电路，以及验证电路 读数据是否与数据缓冲器中保存的数据一致。

公开(公告)号：US09548308B2

公开(公告)日：2017-01-17

申请号：US15044180

申请日：2016-02-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine

IPC: G11C11/00 ,  H01L27/105 ,  G11C11/412 ,  H01L27/11 ,  H01L27/02 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1052 ,  G11C11/412 ,  G11C11/4125 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1108 ,  H01L27/1207 ,  H01L29/7869

Abstract: A nonvolatile memory is provided. A semiconductor device (a nonvolatile memory) has a circuit configuration similar to that of a general SRAM. By providing a transistor whose off-state current is small between a stored data holding portion and a power supply line of the SRAM, leakage of electric charge from the stored data holding portion is prevented. As the transistor whose off-state current is small provided for preventing leakage of electric charge from the stored data holding portion, a transistor including an oxide semiconductor film is preferably used. Such a configuration can also be applied to a shift register, whereby a shift register with low power consumption can be obtained.

Abstract translation: 提供非易失性存储器。 半导体器件（非易失性存储器）具有与普通SRAM类似的电路结构。 通过在存储的数据保持部分和SRAM的电源线之间提供截止电流较小的晶体管，防止从存储的数据保持部分泄漏电荷。 作为提供用于防止从存储的数据保持部分泄漏电荷的截止电流较小的晶体管，优选使用包括氧化物半导体膜的晶体管。 这种配置也可以应用于移位寄存器，由此可以获得具有低功耗的移位寄存器。

公开(公告)号：US20140339551A1

公开(公告)日：2014-11-20

申请号：US14447897

申请日：2014-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine

IPC: H01L27/105 ,  H01L27/11

CPC classification number: H01L27/1052 ,  G11C11/412 ,  G11C11/4125 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1108 ,  H01L27/1207 ,  H01L29/7869

Abstract: A nonvolatile memory is provided. A semiconductor device (a nonvolatile memory) has a circuit configuration similar to that of a general SRAM. By providing a transistor whose off-state current is small between a stored data holding portion and a power supply line of the SRAM, leakage of electric charge from the stored data holding portion is prevented. As the transistor whose off-state current is small provided for preventing leakage of electric charge from the stored data holding portion, a transistor including an oxide semiconductor film is preferably used. Such a configuration can also be applied to a shift register, whereby a shift register with low power consumption can be obtained.

Abstract translation: 提供非易失性存储器。 半导体器件（非易失性存储器）具有与普通SRAM类似的电路结构。 通过在存储的数据保持部分和SRAM的电源线之间提供截止电流较小的晶体管，防止从存储的数据保持部分泄漏电荷。 作为提供用于防止从存储的数据保持部分泄漏电荷的截止电流较小的晶体管，优选使用包括氧化物半导体膜的晶体管。 这种配置也可以应用于移位寄存器，由此可以获得具有低功耗的移位寄存器。

公开(公告)号：US09893195B2

公开(公告)日：2018-02-13

申请号：US14578920

申请日：2014-12-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei Noda ,  Shunpei Yamazaki ,  Tatsuya Honda ,  Yusuke Sekine ,  Hiroyuki Tomatsu

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/84 ,  H01L27/108 ,  H01L27/1156 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7869 ,  H01L21/0242 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02656 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78609

Abstract: A highly reliable transistor which includes an oxide semiconductor and has high field-effect mobility and in which a variation in threshold voltage is small is provided. By using the transistor, a high-performance semiconductor device, which has been difficult to realize, is provided. The transistor includes an oxide semiconductor film which contains two or more kinds, preferably three or more kinds of elements selected from indium, tin, zinc, and aluminum. The oxide semiconductor film is formed in a state where a substrate is heated. Further, oxygen is supplied to the oxide semiconductor film with an adjacent insulating film and/or by ion implantation in a manufacturing process of the transistor, so that oxygen deficiency which generates a carrier is reduced as much as possible. In addition, the oxide semiconductor film is highly purified in the manufacturing process of the transistor, so that the concentration of hydrogen is made extremely low.

公开(公告)号：US09287266B2

公开(公告)日：2016-03-15

申请号：US14447897

申请日：2014-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine

IPC: G11C11/00 ,  H01L27/105 ,  G11C11/412 ,  H01L27/11

CPC classification number: H01L27/1052 ,  G11C11/412 ,  G11C11/4125 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1108 ,  H01L27/1207 ,  H01L29/7869

Abstract: A nonvolatile memory is provided. A semiconductor device (a nonvolatile memory) has a circuit configuration similar to that of a general SRAM. By providing a transistor whose off-state current is small between a stored data holding portion and a power supply line of the SRAM, leakage of electric charge from the stored data holding portion is prevented. As the transistor whose off-state current is small provided for preventing leakage of electric charge from the stored data holding portion, a transistor including an oxide semiconductor film is preferably used. Such a configuration can also be applied to a shift register, whereby a shift register with low power consumption can be obtained.

Abstract translation: 提供非易失性存储器。 半导体器件（非易失性存储器）具有与普通SRAM类似的电路结构。 通过在存储的数据保持部分和SRAM的电源线之间提供截止电流较小的晶体管，防止从存储的数据保持部分泄漏电荷。 作为提供用于防止从存储的数据保持部分泄漏电荷的截止电流较小的晶体管，优选使用包括氧化物半导体膜的晶体管。 这种配置也可以应用于移位寄存器，由此可以获得具有低功耗的移位寄存器。

公开(公告)号：US09123432B2

公开(公告)日：2015-09-01

申请号：US14024769

申请日：2013-09-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine ,  Kiyoshi Kato

IPC: G11C11/34 ,  G11C5/06 ,  G11C5/14 ,  G11C11/419 ,  G11C16/30 ,  G11C7/00 ,  G11C11/40 ,  G11C11/405 ,  G11C11/4076 ,  G11C11/56 ,  G11C13/00 ,  G11C11/4074

CPC classification number: G11C11/40 ,  G11C5/063 ,  G11C5/147 ,  G11C7/00 ,  G11C11/405 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0033 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2211/4016 ,  G11C2213/79

Abstract: A semiconductor device with a novel structure is provided, in which the operation voltage is reduced or the storage capacity is increased by reducing variation in the threshold voltages of memory cells after writing. The semiconductor device includes a plurality of memory cells each including a transistor including an oxide semiconductor and a transistor including a material other than an oxide semiconductor, a driver circuit that drives the plurality of memory cells, and a potential generating circuit that generates a plurality of potentials supplied to the driver circuit. The driver circuit includes a data buffer, a writing circuit that writes one potential of the plurality of potentials into each of the plurality of memory cells as data, a reading circuit that reads the data written into the memory cells, and a verifying circuit that verifies whether the read data agrees with data held in the data buffer or not.

Abstract translation: 提供了一种具有新颖结构的半导体器件，其中通过减少写入之后存储器单元的阈值电压的变化来降低操作电压或者增加存储容量。 半导体器件包括多个存储单元，每个存储单元包括包括氧化物半导体的晶体管和包括除氧化物半导体之外的材料的晶体管，驱动多个存储单元的驱动电路，以及产生多个存储单元的电位产生电路 提供给驱动电路的电位。 驱动器电路包括数据缓冲器，将多个电位中的一个电位写入作为数据的多个存储单元中的每一个的写入电路，读取写入存储单元的数据的读取电路，以及验证电路 读数据是否与数据缓冲器中保存的数据一致。