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1.
公开(公告)号:US07848402B1
公开(公告)日:2010-12-07
申请号:US11239703
申请日:2005-09-29
申请人: Shoujun Wang , Yuming Tao , Tad Kwasniewski , William Bereza
发明人: Shoujun Wang , Yuming Tao , Tad Kwasniewski , William Bereza
CPC分类号: H04L25/03878 , H03H15/00 , H04L25/0276 , H04L25/0288 , H04L25/03025 , H04L25/03038 , H04L25/03057 , H04L2025/03471
摘要: Methods and circuits are provided for producing phase-adjusted pre-emphasis and equalization. In applications in which little or no phase distortion occurs during signal transmission, propagation, or reception, linear-phase pre-emphasis or equalization can be used to reduce or eliminate phase distortion introduced by the pre-emphasis or equalization. Linear phase, constant group delay FIR filters or circuits may have odd numbers of coefficients symmetrical about the middle coefficient. In applications in which signal phase distortion occurs, linear phase or non-linear phase pre-emphasis or equalization can be used to reduce or compensate for the phase distortion. Phase compensation may be effected using FIR pre-emphasis and equalization filters and circuits. Non-linear phase FIR filters may have different numbers and combinations of coefficients.
摘要翻译: 提供了用于产生相位调整预加重和均衡的方法和电路。 在信号传输,传播或接收期间发生很少或没有相位失真的应用中,可以使用线性相位预加重或均衡来减少或消除由预加重或均衡引入的相位失真。 线性相位,常数组延迟FIR滤波器或电路可能具有关于中间系数对称的奇数系数。 在发生信号相位失真的应用中,可以使用线性相位或非线性相位预加重或均衡来减少或补偿相位失真。 可以使用FIR预加重和均衡滤波器和电路实现相位补偿。 非线性相位FIR滤波器可以具有不同的数字和系数的组合。
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公开(公告)号:US07598779B1
公开(公告)日:2009-10-06
申请号:US10962137
申请日:2004-10-08
申请人: Shoujun Wang , Yuming Tao , William Bereza , Tad Kwasniewski
发明人: Shoujun Wang , Yuming Tao , William Bereza , Tad Kwasniewski
IPC分类号: H03K3/00
CPC分类号: H04L25/0272 , H03K19/018528 , H03K19/018585
摘要: A dual-mode LVDS/CML transmitter allows a single circuit to operate as either an LVDS transmitter or a CML transmitter. The transmitter mode can be switched by activating or deactivating appropriate circuit elements, and changing the voltage or current produced by appropriate sources or sinks. This flexibility allows a single transmitter to operate well in both AC and DC coupling conditions, and facilitates interoperation with a greater variety of receivers.
摘要翻译: 双模LVDS / CML发射器允许单个电路作为LVDS发射器或CML发射器工作。 可以通过激活或禁用适当的电路元件以及改变由适当的源或汇产生的电压或电流来切换发射器模式。 这种灵活性允许单个发射机在AC和DC耦合条件下运行良好,并且便于与更多种类的接收器的互操作。
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公开(公告)号:US07693691B1
公开(公告)日:2010-04-06
申请号:US11524012
申请日:2006-09-19
申请人: Yuming Tao , William W. Bereza , Rakesh H. Patel , Tad Kwasniewski , Sergey Shumarayev , Shoujun Wang , Miao Li
发明人: Yuming Tao , William W. Bereza , Rakesh H. Patel , Tad Kwasniewski , Sergey Shumarayev , Shoujun Wang , Miao Li
CPC分类号: G06F17/5009
摘要: Systems and methods for accurately and quickly simulating link performance of a transceiver operating with any given transmission medium are provided. Accurate and quick link simulations may be provided using a link simulation platform. The link simulation platform may simulate link performance using transceiver behavioral models (e.g., transmitter and receiver behavioral models) that incorporate silicon level parameters, which parameters enable the behavioral models to substantially emulate the actual behavior of the transceiver portions of the link.
摘要翻译: 提供了用于准确和快速地模拟使用任何给定传输介质工作的收发器的链路性能的系统和方法。 可以使用链路仿真平台提供准确和快速的链路模拟。 链路仿真平台可以使用包含硅级参数的收发机行为模型(例如,发射机和接收机行为模型)来模拟链路性能,这些参数使得行为模型能够基本上模拟链路的收发器部分的实际行为。
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4.
公开(公告)号:US06870273B2
公开(公告)日:2005-03-22
申请号:US10424817
申请日:2003-04-29
申请人: Yuming Tao , Vernon R. Little
发明人: Yuming Tao , Vernon R. Little
IPC分类号: H01L21/60 , H01L23/50 , H01L23/528 , H01L23/552 , H01L23/48
CPC分类号: H01L24/81 , H01L23/50 , H01L23/5286 , H01L23/552 , H01L23/66 , H01L2223/6627 , H01L2223/6638 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16225 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01076 , H01L2924/014 , H01L2924/14 , H01L2924/1423 , H01L2924/15311 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014
摘要: Gridded I/O pads for flip-chip packages in which a coaxial-like solder bump pad configuration is used in which the I/O pads closest to the signal or bump pad are power or ground pads. The ground pads surrounding the signal pad form a coaxial-like pad configuration for impedance matching at the transition from die to package substrate. The ground pads surrounding the signal pad may be connected by a metal trace to form a ground pad ring. The invention employs conductor-backed ground coplanar waveguides (GCPW), which match impedance at connections between I/O cells and signal pads to enhance signal transmission, avoid reflection and leakage, and provide superior electromagnetic shielding. The present invention also supports high quantities of I/Os for a given die size, and supports flexible power and ground placement.
摘要翻译: 用于倒装芯片封装的栅格I / O焊盘,其中使用最接近信号或凸块焊盘的I / O焊盘的同轴式焊料凸块焊盘配置是电源或接地焊盘。 围绕信号焊盘的接地焊盘形成同轴状的焊盘配置,用于在从芯片到封装基板的过渡处的阻抗匹配。 信号焊盘周围的接地焊盘可以通过金属迹线连接以形成接地焊盘环。 本发明采用导体背面的共面波导(GCPW),其与I / O单元和信号焊盘之间的连接处的阻抗匹配,以增强信号传输,避免反射和泄漏,并提供卓越的电磁屏蔽。 本发明还支持用于给定裸片尺寸的大量I / O,并且支持灵活的电源和接地放置。
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公开(公告)号:US07405477B1
公开(公告)日:2008-07-29
申请号:US11292685
申请日:2005-12-01
IPC分类号: H01L23/552
CPC分类号: H05K1/0243 , H01L23/49838 , H01L23/552 , H01L2223/6622 , H01L2223/6627 , H01L2223/6638 , H01L2224/16227 , H01L2924/0002 , H01L2924/1903 , H01L2924/19051 , H01L2924/3011 , H05K1/0298 , H05K2201/0191 , H05K2201/09718 , H05K2201/10734 , H01L2924/00
摘要: A package-board co-design methodology preserves the signal integrity of high-speed signals passing from semiconductor packages to application PCBs. An optimal architecture of interconnects between package and PCB enhances the signal propagation, minimizes parasitic levels, and decreases electromagnetic interference from adjacent high frequency signals. The invention results in devices with superior signal quality and EMI shielding properties with enhanced capability for carrying data stream at multiple-gigabit per second bit-rates.
摘要翻译: 封装板协同设计方法保留了从半导体封装到应用PCB的高速信号的信号完整性。 封装和PCB之间互连的最佳架构增强了信号传播,使寄生电平最小化,并降低了来自相邻高频信号的电磁干扰。 本发明导致具有优异的信号质量和EMI屏蔽性能的装置,具有增强的以千兆位/秒比特率速率承载数据流的能力。
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公开(公告)号:US07514789B1
公开(公告)日:2009-04-07
申请号:US12147411
申请日:2008-06-26
IPC分类号: H01L23/48
CPC分类号: H05K1/0243 , H01L23/49838 , H01L23/552 , H01L2223/6622 , H01L2223/6627 , H01L2223/6638 , H01L2224/16227 , H01L2924/0002 , H01L2924/1903 , H01L2924/19051 , H01L2924/3011 , H05K1/0298 , H05K2201/0191 , H05K2201/09718 , H05K2201/10734 , H01L2924/00
摘要: A package-board co-design methodology preserves the signal integrity of high-speed signals passing from semiconductor packages to application PCBs. An optimal architecture of interconnects between package and PCB enhances the signal propagation, minimizes parasitic levels, and decreases electromagnetic interference from adjacent high frequency signals. The invention results in devices with superior signal quality and EMI shielding properties with enhanced capability for carrying data stream at multiple-gigabit per second bit-rates.
摘要翻译: 封装板协同设计方法保留了从半导体封装到应用PCB的高速信号的信号完整性。 封装和PCB之间互连的最佳架构增强了信号传播,使寄生电平最小化,并降低了来自相邻高频信号的电磁干扰。 本发明导致具有优异信号质量和EMI屏蔽性能的装置,具有增强的以千兆比特每秒比特率传送数据流的能力。
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