公开(公告)号：US20090160753A1

公开(公告)日：2009-06-25

申请号：US12371936

申请日：2009-02-17

申请人： Jun KOYAMA ,  Keitaro IMAI ,  Shinji MAEKAWA ,  Makoto FURUNO ,  Osamu NAKAMURA ,  Shunpei YAMAZAKI

发明人： Jun KOYAMA ,  Keitaro IMAI ,  Shinji MAEKAWA ,  Makoto FURUNO ,  Osamu NAKAMURA ,  Shunpei YAMAZAKI

IPC分类号： G09G3/36

CPC分类号： H01L27/1288 ,  G02F1/13454 ,  G02F1/13624 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/08 ,  G09G2310/0289 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/78669 ,  H01L29/78678

摘要： When semi-amorphous TFTs are used for forming a signal line driver circuit and a pixel, a large amplitude is required for driving the pixel, and a large power supply voltage is thus needed. On the other hand, when a shift register is made up of transistors having a single conductivity, a bootstrap circuit is required, and a voltage over a power supply is applied to a specific element. Therefore, not both the driving amplitude and the reliability can be achieved with a single power supply. According to the invention, a level shifter having a single conductivity is provided to solve such a problem.

摘要翻译： 当使用半非晶TFT来形成信号线驱动电路和像素时，驱动像素需要大的幅度，因此需要大的电源电压。 另一方面，当移位寄存器由具有单一导电性的晶体管构成时，需要自举电路，并且将电源上的电压施加到特定元件。 因此，不能通过单个电源实现驱动振幅和可靠性。 根据本发明，提供具有单一电导率的电平移位器来解决这个问题。

公开(公告)号：US20110101332A1

公开(公告)日：2011-05-05

申请号：US12910908

申请日：2010-10-25

申请人： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

发明人： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

IPC分类号： H01L29/12

CPC分类号： H01L27/10802 ,  G11C11/404 ,  G11C11/405 ,  G11C16/02 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869

摘要： The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10−13 A or less.

摘要翻译： 半导体器件包括：具有氧化物半导体层的晶体管; 以及使用除了氧化物半导体之外的半导体材料形成的逻辑电路。 晶体管的源电极和漏电极中的一个电连接到逻辑电路的至少一个输入端，并且至少一个输入信号通过晶体管施加到逻辑电路。 晶体管的截止电流优选为1×10-13A以下。

公开(公告)号：US20110089417A1

公开(公告)日：2011-04-21

申请号：US12906565

申请日：2010-10-18

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1207 ,  H01L27/1225

摘要： An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

摘要翻译： 本发明的目的是提供一种具有新结构的半导体器件。 公开了一种半导体器件，包括：第一晶体管，其在包含半导体材料的衬底上包括沟道形成区域，形成有沟道形成区域的杂质区域，沟道形成区域上的第一栅极绝缘层， 所述第一栅极绝缘层以及与所述杂质区电连接的第一源电极和第一漏电极; 以及第二晶体管，其在包含半导体材料的衬底上方包括第二栅极电极，在第二栅极电极上方的第二栅极绝缘层，在第二栅极绝缘层上方的氧化物半导体层，以及第二源极电极和第二漏极电极 其电连接到氧化物半导体层。

公开(公告)号：US20110186850A1

公开(公告)日：2011-08-04

申请号：US13085750

申请日：2011-04-13

申请人： Shunpei YAMAZAKI ,  Shinji MAEKAWA ,  Makoto FURUNO ,  Osamu NAKAMURA ,  Keitaro IMAI

发明人： Shunpei YAMAZAKI ,  Shinji MAEKAWA ,  Makoto FURUNO ,  Osamu NAKAMURA ,  Keitaro IMAI

IPC分类号： H01L33/16 ,  H01L21/336

CPC分类号： H01L33/08 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/66765 ,  H01L2924/0002 ,  Y10T428/24421 ,  H01L2924/00

摘要： At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

摘要翻译： 通过能够选择性地形成图案以制造液晶的方法形成至少一个或多个形成布线或电极的导电层和制造用于形成预定图案的掩模等显示面板所需的图案 显示设备。 使用能够通过根据特定目的选择性地排出组合物的液滴来形成预定图案的液滴喷射方法作为能够在形成导电层，绝缘层等中选择性地形成图案的方法。

公开(公告)号：US20110220725A1

公开(公告)日：2011-09-15

申请号：US13112373

申请日：2011-05-20

申请人： Jun KOYAMA ,  Keitaro IMAI

发明人： Jun KOYAMA ,  Keitaro IMAI

IPC分类号： G06K19/073

CPC分类号： H01L27/13 ,  G11C17/16 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1266

摘要： A semiconductor device which may be used as an ID chip and data may be rewritten only one time. In addition, a semiconductor device may be used as an ID chip and data may be written except when manufacturing the chip. The invention has a modulating circuit, a demodulating circuit, a logic circuit, a memory circuit, and an antenna circuit over an insulating substrate. The modulating circuit and the demodulating circuit are electrically connected to an antenna circuit, the demodulating circuit is connected to the logic circuit, the memory circuit stores an output signal of the logic circuit, and the memory circuit is a fuse memory circuit using a fuse element.

摘要翻译： 可以用作ID芯片和数据的半导体器件可以仅重写一次。 此外，半导体器件可以用作ID芯片，并且可以写入数据，除非在制造芯片时。 本发明在绝缘基板上具有调制电路，解调电路，逻辑电路，存储电路和天线电路。 调制电路和解调电路电连接到天线电路，解调电路连接到逻辑电路，存储电路存储逻辑电路的输出信号，存储电路是使用熔丝元件的熔丝存储电路 。

公开(公告)号：US20090284310A1

公开(公告)日：2009-11-19

申请号：US12510494

申请日：2009-07-28

申请人： Jun KOYAMA ,  Keitaro IMAI

发明人： Jun KOYAMA ,  Keitaro IMAI

IPC分类号： H01L25/00

CPC分类号： H01L27/13 ,  G11C17/16 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1266

摘要： A semiconductor device which may be used as an ID chip and data may be rewritten only one time. In addition, a semiconductor device may be used as an ID chip and data may be written except when manufacturing the chip. The invention has a modulating circuit, a demodulating circuit, a logic circuit, a memory circuit, and an antenna circuit over an insulating substrate. The modulating circuit and the demodulating circuit are electrically connected to an antenna circuit, the demodulating circuit is connected to the logic circuit, the memory circuit stores an output signal of the logic circuit, and the memory circuit is a fuse memory circuit using a fuse element.

摘要翻译： 可以用作ID芯片和数据的半导体器件可以仅重写一次。 此外，半导体器件可以用作ID芯片，并且可以写入数据，除非在制造芯片时。 本发明在绝缘基板上具有调制电路，解调电路，逻辑电路，存储电路和天线电路。 调制电路和解调电路电连接到天线电路，解调电路连接到逻辑电路，存储电路存储逻辑电路的输出信号，存储电路是使用熔丝元件的熔丝存储电路 。

公开(公告)号：US20110297928A1

公开(公告)日：2011-12-08

申请号：US13117588

申请日：2011-05-27

申请人： Atsuo ISOBE ,  Yoshinori IEDA ,  Keitaro IMAI ,  Kiyoshi KATO ,  Yuto YAKUBO ,  Yuki HATA

发明人： Atsuo ISOBE ,  Yoshinori IEDA ,  Keitaro IMAI ,  Kiyoshi KATO ,  Yuto YAKUBO ,  Yuki HATA

IPC分类号： H01L27/105

CPC分类号： H01L27/105 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/1225 ,  H01L28/60

摘要： The semiconductor device is provided in which a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is arranged in matrix and a wiring (also referred to as a bit line) for connecting one of the memory cells and another one of the memory cells and a source or drain region in the first transistor are electrically connected through a conductive layer and a source or drain electrode in the second transistor provided therebetween. With this structure, the number of wirings can be reduced in comparison with a structure in which the source or drain electrode in the first transistor and the source or drain electrode in the second transistor are connected to different wirings. Thus, the integration degree of a semiconductor device can be increased.

摘要翻译： 提供了一种半导体器件，其中包括第一晶体管，第二晶体管和电容器的多个存储单元被布置成矩阵，并且布线（也称为位线）用于连接其中一个存储单元和另一个 第一晶体管中的一个存储单元和源极或漏极区域通过导电层和设置在其间的第二晶体管中的源极或漏极电连接。 利用这种结构，与第一晶体管中的源极或漏极以及第二晶体管中的源极或漏极连接到不同布线的结构相比，可以减少布线的数量。 因此，可以提高半导体器件的集成度。

公开(公告)号：US20110115369A1

公开(公告)日：2011-05-19

申请号：US13011093

申请日：2011-01-21

申请人： Satoshi SEO ,  Keitaro IMAI

发明人： Satoshi SEO ,  Keitaro IMAI

IPC分类号： H01J1/62

CPC分类号： H01L51/5092 ,  H01L27/3244 ,  Y10S428/917

摘要： Provided is a means for improving the capability of injecting electrons from a cathode in a luminous element and solving problems about the production process thereof. In the present invention, a material having a smaller work function than a cathode material is used to form an inorganic conductive layer between the cathode and an organic compound layer. In this way, the capability of injecting electrons from the cathode can be improved. Furthermore, the film thereof can be thicker than that of a conventional cathode buffer layer formed by using an insulating material. Therefore, the film thickness can easily be controlled, and a decrease in production costs and an improvement in yield can be achieved.

摘要翻译： 提供了用于提高从发光元件中的阴极注入电子的能力的手段，并且解决了关于其制造方法的问题。 在本发明中，使用具有比正极材料功函数小的材料在阴极和有机化合物层之间形成无机导电层。 以这种方式，可以提高从阴极注入电子的能力。 此外，其膜可以比通过使用绝缘材料形成的常规阴极缓冲层的膜厚。 因此，可以容易地控制膜厚度，并且可以实现生产成本的降低和产率的提高。

公开(公告)号：US20120049189A1

公开(公告)日：2012-03-01

申请号：US13188992

申请日：2011-07-22

申请人： Toshinari SASAKI ,  Hitomi SATO ,  Kosei NODA ,  Yuta ENDO ,  Mizuho IKARASHI ,  Keitaro IMAI ,  Atsuo ISOBE ,  Yutaka OKAZAKI

发明人： Toshinari SASAKI ,  Hitomi SATO ,  Kosei NODA ,  Yuta ENDO ,  Mizuho IKARASHI ,  Keitaro IMAI ,  Atsuo ISOBE ,  Yutaka OKAZAKI

IPC分类号： H01L29/12 ,  H01L21/36

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

摘要： It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

摘要翻译： 本发明的目的是制造其中包括氧化物半导体的晶体管具有常态特性，电特性波动小，可靠性高的半导体器件。 首先，在基板上进行第一热处理，在基板上形成基极绝缘层，在基底绝缘层上形成氧化物半导体层，对形成氧化物半导体的工序进行第一热处理的工序 在不暴露于空气的情况下执行层。 接下来，在形成氧化物半导体层之后，进行第二热处理。 使用通过加热而释放氧的绝缘层作为基底绝缘层。

公开(公告)号：US20100141131A1

公开(公告)日：2010-06-10

申请号：US12702606

申请日：2010-02-09

申请人： Satoshi SEO ,  Keitaro IMAI

发明人： Satoshi SEO ,  Keitaro IMAI

IPC分类号： H01J1/62

CPC分类号： H01L51/5092 ,  H01L27/3244 ,  Y10S428/917

摘要： Provided is a means for improving the capability of injecting electrons from a cathode in a luminous element and solving problems about the production process thereof. In the present invention, a material having a smaller work function than a cathode material is used to form an inorganic conductive layer between the cathode and an organic compound layer. In this way, the capability of injecting electrons from the cathode can be improved. Furthermore, the film thereof can be thicker than that of a conventional cathode buffer layer formed by using an insulating material. Therefore, the film thickness can easily be controlled, and a decrease in production costs and an improvement in yield can be achieved.

摘要翻译： 提供了用于提高从发光元件中的阴极注入电子的能力的手段，并且解决了关于其制造方法的问题。 在本发明中，使用具有比正极材料功函数小的材料在阴极和有机化合物层之间形成无机导电层。 以这种方式，可以提高从阴极注入电子的能力。 此外，其膜可以比通过使用绝缘材料形成的常规阴极缓冲层的膜厚。 因此，可以容易地控制膜厚度，并且可以实现生产成本的降低和产率的提高。