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    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110084268A1

    公开(公告)日：2011-04-14

    申请号：US12898366

    申请日：2010-10-05

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

    IPC分类号： H01L29/12 ,  H01L21/16

    CPC分类号： H01L29/78669 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78678 ,  H01L29/7869

    摘要： It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.

    摘要翻译： 本发明的目的是提供一种由具有良好的显示质量的显示装置代表的半导体器件，其中在半导体层和电极之间的连接部分中产生的寄生电阻被抑制，并且具有诸如电压降等的不利影响 防止由于布线电阻而导致像素的信号布线，灰度级的缺陷等。 为了实现上述目的，根据本发明的半导体器件可以具有这样的结构，其中具有低电阻的布线连接到薄膜晶体管，其中包括具有高氧亲和力的金属的源电极和漏电极是 连接到具有抑制的杂质浓度的氧化物半导体层。 另外，包含氧化物半导体的薄膜晶体管也可以被要被密封的绝缘膜包围。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20110084337A1

    公开(公告)日：2011-04-14

    申请号：US12898345

    申请日：2010-10-05

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hideki Uochi ,  Yasuo Nakamura ,  Junpei Sugao

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hideki Uochi ,  Yasuo Nakamura ,  Junpei Sugao

    IPC分类号： H01L27/12 ,  H01L21/84

    CPC分类号： H01L27/12 ,  H01L27/124

    摘要： As for a semiconductor device which is typified by a display device, it is an object to provide a highly reliable semiconductor device to which a large-sized or high-definition screen is applicable and which has high display quality and operates stably. By using a conductive layer including Cu as a long lead wiring, an increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

    摘要翻译： 对于以显示装置为代表的半导体装置，其目的在于提供一种高可靠性的可应用大尺寸或高清晰度屏幕的高可靠性半导体装置，其具有高显示质量并且稳定地工作。 通过使用包含Cu作为长引线的导电层，可以抑制布线电阻的增加。 此外，包括Cu的导电层以与形成TFT的沟道区域的半导体层不重叠并且被包括氮化硅的绝缘层包围的方式设置，由此可以防止Cu的扩散 ; 因此，可以制造高度可靠的半导体器件。 具体地说，作为半导体装置的一个实施方式的显示装置，即使在尺寸或定义增加的情况下也能够具有高的显示质量，并且稳定地工作。

    Semiconductor device and method for manufacturing the same
    5.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08253144B2

    公开(公告)日：2012-08-28

    申请号：US12898345

    申请日：2010-10-05

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hideki Uochi ,  Yasuo Nakamura ,  Junpei Sugao

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hideki Uochi ,  Yasuo Nakamura ,  Junpei Sugao

    IPC分类号： H01L27/14

    CPC分类号： H01L27/12 ,  H01L27/124

    摘要： As for a semiconductor device which is typified by a display device, it is an object to provide a highly reliable semiconductor device to which a large-sized or high-definition screen is applicable and which has high display quality and operates stably. By using a conductive layer including Cu as a long lead wiring, an increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

    摘要翻译： 对于以显示装置为代表的半导体装置，其目的在于提供一种高可靠性的可应用大尺寸或高清晰度屏幕的高可靠性半导体装置，其具有高显示质量并且稳定地工作。 通过使用包含Cu作为长引线的导电层，可以抑制布线电阻的增加。 此外，包括Cu的导电层以与形成TFT的沟道区域的半导体层不重叠并且被包括氮化硅的绝缘层包围的方式设置，由此可以防止Cu的扩散 ; 因此，可以制造高度可靠的半导体器件。 具体地说，作为半导体装置的一个实施方式的显示装置，即使在尺寸或定义增加的情况下也能够具有高的显示质量，并且稳定地工作。

    Display device
    7.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号：US07989815B2

    公开(公告)日：2011-08-02

    申请号：US12571552

    申请日：2009-10-01

    申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

    发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

    IPC分类号： H01L29/04

    CPC分类号： H01L29/7869 ,  H01L27/0266 ,  H01L27/1225 ,  H01L27/124

    摘要： The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.

    摘要翻译： 保护电路使用非线性元件形成，该非线性元件包括覆盖栅电极的栅极绝缘膜; 第一布线层和第二布线层，其在栅极绝缘膜上方并且其端部与栅电极重叠; 以及氧化物半导体层，其在所述栅电极的上方并与所述栅极绝缘膜和所述第一布线层和所述第二布线层的端部接触。 非线性元件的栅电极和扫描线或信号线包括在布线中，非线性元件的第一或第二布线层直接连接到布线，以施加栅极的电位 电极。

    Semiconductor and process for fabricating the same
    8.
    发明授权
    Semiconductor and process for fabricating the same 有权
    半导体及其制造方法

    公开(公告)号：US6110770A

    公开(公告)日：2000-08-29

    申请号：US229306

    申请日：1999-01-13

    申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Shunpei Yamazaki ,  Yasuhiko Takemura

    发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Shunpei Yamazaki ,  Yasuhiko Takemura

    IPC分类号： H01L21/20 ,  H01L21/00 ,  H01L21/324 ,  H01L21/336 ,  H01L27/12 ,  H01L29/02 ,  H01L29/78 ,  H01L29/786 ,  H01L21/84

    CPC分类号： H01L21/2022 ,  H01L27/1281 ,  H01L29/66757

    摘要： A process for fabricating a semiconductor by crystallizing a silicon film in a substantially amorphous state by annealing it at a temperature not higher than the crystallization temperature of amorphous silicon, and it comprises forming selectively, on the surface or under an amorphous silicon film, a coating, particles, clusters, and the like containing nickel, iron, cobalt, platinum or palladium either as a pure metal or a compound thereof such as a silicide, a salt, and the like, shaped into island-like portions, linear portions, stripes, or dots; and then annealing the resulting structure at a temperature lower than the crystallization temperature of an amorphous silicon by 20 to 150.degree. C.

    摘要翻译： 一种通过在不高于非晶硅的结晶温度的温度下进行退火将基本无定形态的硅膜结晶化的半导体制造方法，其包括在表面上或非晶硅膜下选择性地形成涂层 ，含有镍，铁，钴，铂或钯的颗粒，簇等作为纯金属或其化合物，例如硅化物，盐等，成形为岛状部分，线状部分，条纹 ，或点; 然后在低于非晶硅的结晶温度的温度下将所得结构退火20〜150℃。

    Method for forming thin film transistor
    10.
    发明授权
    Method for forming thin film transistor 失效
    薄膜晶体管的形成方法

    公开(公告)号：US5650338A

    公开(公告)日：1997-07-22

    申请号：US216277

    申请日：1994-03-23

    申请人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

    发明人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

    IPC分类号： H01L21/336 ,  H01L21/84

    CPC分类号： H01L27/1214 ,  H01L29/66757

    摘要： In film forming of thin film semiconductors (TFTs), a gate electrode having an anodic-oxidizable material is formed on a substrate, and the surface of the gate electrode is oxidized by anodic oxidation in an electrolytic solution so that the surface of the gate electrode is coated with an insulating film. The doping is performed using the gate electrode and the anodic oxide film as a mask, to form a source and a drain region. Then, when the laminate is again dipped in an electrolytic solution, and a voltage is applied to the gate electrode so that a current curing produces in the laminate. During the current curing, a positive voltage is preferably applied to the gate electrode for N-channel TFTs and a negative voltage is preferably to the gate electrode for P-channel TFTs. After the doping, the source and the drain region is activated by laser annealing or the like, prior to the current curing.

    摘要翻译： 在薄膜半导体（TFT）的成膜中，在基板上形成具有阳极氧化材料的栅电极，并且通过电解液中的阳极氧化使栅电极的表面氧化，使得栅电极的表面 涂有绝缘膜。 使用栅电极和阳极氧化膜作为掩模进行掺杂，以形成源区和漏区。 然后，当层叠体再次浸渍在电解液中时，向栅电极施加电压，使得层压体产生电流固化。 在电流固化期间，优选对N沟道TFT的栅电极施加正电压，对P沟道TFT优选施加负电压。 在掺杂之后，在目前的固化之前，源极和漏极区域被激光退火等激活。