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公开(公告)号：US20070222081A1
公开(公告)日：2007-09-27
申请号：US11308422
申请日：2006-03-23
申请人： Shyng-Tsong Chen , Qinghung Lin , Kelly Malone , Sanjay Mehta , Terry Spooner , Chih-Chao Yang
发明人： Shyng-Tsong Chen , Qinghung Lin , Kelly Malone , Sanjay Mehta , Terry Spooner , Chih-Chao Yang
IPC分类号： H01L23/52
CPC分类号： H01L21/76825 , H01L21/3105 , H01L21/31058 , H01L21/76808 , H01L21/76814 , H01L21/76831
摘要： When an interconnect structure is built on porous ultra low k (ULK) material, the bottom of the trench and/or via is usually damaged by a following metallization process which may be suitable for dense higher dielectric materials. Embodiment of the present invention may provide a method of forming an interconnect structure on an inter-layer dielectric (ILD) material. The method includes steps of treating an exposed area of said ILD material to create a densified area, and metallizing said densified area.
摘要翻译： 当在多孔超低k（ULK）材料上构建互连结构时，沟槽和/或通孔的底部通常被以下金属化工艺损坏，这可能适合于较高的介电材料。 本发明的实施例可以提供在层间电介质（ILD）材料上形成互连结构的方法。 该方法包括处理所述ILD材料的暴露区域以产生致密化区域以及金属化所述致密化区域的步骤。
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公开(公告)号：US07816253B2
公开(公告)日：2010-10-19
申请号：US11308422
申请日：2006-03-23
申请人： Shyng-Tsong Chen , Qinghuang Lin , Kelly Malone , Sanjay Mehta , Terry A. Spooner , Chih-Chao Yang
发明人： Shyng-Tsong Chen , Qinghuang Lin , Kelly Malone , Sanjay Mehta , Terry A. Spooner , Chih-Chao Yang
IPC分类号： H01L21/76 , H01L21/425 , H01L21/4763
CPC分类号： H01L21/76825 , H01L21/3105 , H01L21/31058 , H01L21/76808 , H01L21/76814 , H01L21/76831
摘要： When an interconnect structure is built on porous ultra low k (ULK) material, the bottom of the trench and/or via is usually damaged by a following metallization process which may be suitable for dense higher dielectric materials. Embodiment of the present invention may provide a method of forming an interconnect structure on an inter-layer dielectric (ILD) material. The method includes steps of treating an exposed area of said ILD material to create a densified area, and metallizing said densified area.
摘要翻译： 当在多孔超低k（ULK）材料上构建互连结构时，沟槽和/或通孔的底部通常被以下金属化工艺损坏，这可能适合于较高的介电材料。 本发明的实施例可以提供在层间电介质（ILD）材料上形成互连结构的方法。 该方法包括处理所述ILD材料的暴露区域以产生致密化区域以及金属化所述致密化区域的步骤。
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公开(公告)号：US07671470B2
公开(公告)日：2010-03-02
申请号：US12179057
申请日：2008-07-24
IPC分类号： H01L21/461
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
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公开(公告)号：US20080284030A1
公开(公告)日：2008-11-20
申请号：US12179057
申请日：2008-07-24
IPC分类号： H01L23/48
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
摘要翻译： 本发明提供了一种改进的可靠性的互连结构。 本发明的互连结构具有增强的由嵌入式金属衬垫提供的通孔触点的机械强度。 嵌入的金属衬垫可以是连续的或不连续的。 不连续的嵌入式金属衬垫由位于层间介质层内的通孔底部的不连续界面提供。
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公开(公告)号：US20080280434A1
公开(公告)日：2008-11-13
申请号：US12179054
申请日：2008-07-24
IPC分类号： H01L21/4763
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
摘要翻译： 本发明提供了一种改进的可靠性的互连结构。 本发明的互连结构具有增强的由嵌入式金属衬垫提供的通孔触点的机械强度。 嵌入的金属衬垫可以是连续的或不连续的。 不连续的嵌入式金属衬垫由位于层间介质层内的通孔底部的不连续界面提供。
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6.发明申请PROVIDING GAPS IN CAPPING LAYER TO REDUCE TENSILE STRESS FOR BEOL FABRICATION OF INTEGRATED CIRCUITS 审中-公开提供覆盖层的GAPS以降低集成电路的BEOL制造的拉伸应力公开(公告)号：US20080315347A1
公开(公告)日：2008-12-25
申请号：US11767789
申请日：2007-06-25
申请人： Griselda Bonilla , Shyng-Tsong Chen , Ronald A. DellaGuardia , Qinghuang Lin , Kelly Malone , Shom S. Ponoth , Chih-Chao Yang
发明人： Griselda Bonilla , Shyng-Tsong Chen , Ronald A. DellaGuardia , Qinghuang Lin , Kelly Malone , Shom S. Ponoth , Chih-Chao Yang
CPC分类号： H01L21/31695 , H01L21/02107 , H01L21/02203 , H01L21/7682 , H01L21/76825 , H01L21/76829 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Fabricating an integrated circuit using a cap layer that includes one or more gaps or voids. The gaps or voids are provided prior to performing deposition and cure for an inter-layer dielectric (ILD) layer adjoining the cap layer. The gaps or voids reduce and prevent tensile stress buildup by allowing for stress relaxation, hence preventing catastrophic failure of the integrated circuit.
摘要翻译： 使用包括一个或多个间隙或空隙的盖层来制造集成电路。 在对与盖层相邻的层间电介质（ILD）层进行沉积和固化之前，提供间隙或空隙。 间隙或空隙通过允许应力松弛减小并防止拉伸应力累积，从而防止集成电路的灾难性故障。
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公开(公告)号：US20070284736A1
公开(公告)日：2007-12-13
申请号：US11419077
申请日：2006-05-18
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
摘要翻译： 本发明提供了一种改进的可靠性的互连结构。 本发明的互连结构具有增强的由嵌入式金属衬垫提供的通孔触点的机械强度。 嵌入的金属衬垫可以是连续的或不连续的。 不连续的嵌入式金属衬垫由位于层间介质层内的通孔底部的不连续界面提供。
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公开(公告)号：US07670943B2
公开(公告)日：2010-03-02
申请号：US12179054
申请日：2008-07-24
IPC分类号： H01L21/4763
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
摘要翻译： 本发明提供了一种改进的可靠性的互连结构。 本发明的互连结构具有增强的由嵌入式金属衬垫提供的通孔触点的机械强度。 嵌入的金属衬垫可以是连续的或不连续的。 不连续的嵌入式金属衬垫由位于层间介质层内的通孔底部的不连续界面提供。
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公开(公告)号：US07439624B2
公开(公告)日：2008-10-21
申请号：US11419077
申请日：2006-05-18
IPC分类号： H01L23/48
CPC分类号： H01L23/5226 , H01L21/76844 , H01L21/76847 , H01L21/76877 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an enhanced interconnect structure with improved reliability. The inventive interconnect structure has enhanced mechanical strength of via contacts provided by embedded metal liners. The embedded metal liners may be continuous or discontinuous. Discontinuous embedded metal liners are provided by a discontinuous interface at the bottom of the via located within the interlayer dielectric layer.
摘要翻译： 本发明提供了一种改进的可靠性的互连结构。 本发明的互连结构具有增强的由嵌入式金属衬垫提供的通孔触点的机械强度。 嵌入的金属衬垫可以是连续的或不连续的。 不连续的嵌入式金属衬垫由位于层间介质层内的通孔底部的不连续界面提供。
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公开(公告)号：US20060264036A1
公开(公告)日：2006-11-23
申请号：US11491816
申请日：2006-07-24
申请人： Shyng-Tsong Chen , Stefanie Chiras , Matthew Colburn , Tomothy Dalton , Jeffrey Hedrick , Elbert Huang , Kaushik Kumar , Michael Lane , Kelly Malone , Chandrasekhar Narayan , Satyanarayana Nitta , Sampath Purushothaman , Robert Rosenberg , Christy Tyberg , Roy Yu
发明人： Shyng-Tsong Chen , Stefanie Chiras , Matthew Colburn , Tomothy Dalton , Jeffrey Hedrick , Elbert Huang , Kaushik Kumar , Michael Lane , Kelly Malone , Chandrasekhar Narayan , Satyanarayana Nitta , Sampath Purushothaman , Robert Rosenberg , Christy Tyberg , Roy Yu
IPC分类号： H01L21/4763
CPC分类号： H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： In a multilevel microelectronic integrated circuit, air comprises permanent line level dielectric and ultra low-K materials are via level dielectric. The air is supplied to line level subsequent to removal of sacrificial material by clean thermal decomposition and assisted diffusion of byproducts through porosities in the IC structure. Optionally, air is also included within porosities in the via level dielectric. By incorporating air to the extent produced in the invention, intralevel and interlevel dielectric values are minimized.
摘要翻译： 在多电平微电子集成电路中，空气包括永久线路电介质，超低K材料通过电介质。 在通过清洁热分解除去牺牲材料并通过IC结构中的孔隙率辅助副产物扩散后，将空气供应到线路电平。 任选地，空气也包括在通孔级电介质中的孔隙中。 通过将空气结合到本发明产生的程度，使层内和层间介电值最小化。
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