公开(公告)号：US20070166840A1

公开(公告)日：2007-07-19

申请号：US11333997

申请日：2006-01-18

申请人： Solomon Assefa ,  Michael Gaidis ,  Sivananda Kanakasabapathy ,  John Hummel ,  David Abraham

发明人： Solomon Assefa ,  Michael Gaidis ,  Sivananda Kanakasabapathy ,  John Hummel ,  David Abraham

IPC分类号： H01L21/00 ,  H01L29/94

CPC分类号： H01L43/12 ,  H01L27/222

摘要： Novel methods for reliably and reproducibly forming magnetic tunnel junctions in integrated circuits are described. In accordance with aspects of the invention, sidewall spacer features are utilized during the processing of the film stack. Advantageously, these sidewall spacer features create a tapered masking feature which helps to avoid byproduct redeposition during the etching of the MTJ film stack, thereby improving process yield. Moreover, the sidewall spacer features may be used as encapsulating layers during subsequent processing steps and as vertical contacts to higher levels of metallization.

摘要翻译： 描述了在集成电路中可靠且可重复地形成磁隧道结的新方法。 根据本发明的方面，在膜叠层的处理期间利用侧壁间隔物特征。 有利地，这些侧壁间隔物特征产生锥形掩蔽特征，其有助于避免在MTJ膜叠层的蚀刻期间的副产物再沉积，从而提高工艺产率。 此外，侧壁间隔物特征可以在随后的处理步骤期间用作包封层，并且可以用作垂直接触以进行更高级别的金属化。

公开(公告)号：US20080043379A1

公开(公告)日：2008-02-21

申请号：US11926845

申请日：2007-10-29

申请人： Sivananda Kanakasabapathy ,  Michael Gaidis

发明人： Sivananda Kanakasabapathy ,  Michael Gaidis

IPC分类号： G11B5/33

CPC分类号： H01L43/12 ,  H01L21/76897 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/3011

摘要： Techniques for forming a magnetic device are provided. In one aspect, a magnetic device includes a magnetic tunnel junction and a dielectric layer formed over at least a portion of the magnetic tunnel junction. The dielectric layer is configured to have an underlayer proximate to the magnetic tunnel junction, and an overlayer on a side of the underlayer opposite the magnetic tunnel junction. The magnetic device further includes a via hole running substantially vertically through the dielectric layer and being self-aligned with the magnetic tunnel junction.

摘要翻译： 提供了用于形成磁性装置的技术。 在一个方面，磁性装置包括形成在磁性隧道结的至少一部分上的磁性隧道结和介电层。 介电层被配置为具有靠近磁性隧道结的底层，以及与该底层的与磁性隧道结相对的一侧上的覆盖层。 磁性器件还包括通孔，该通孔基本垂直穿过介电层并与磁性隧道结自对准。

公开(公告)号：US20070048950A1

公开(公告)日：2007-03-01

申请号：US11209951

申请日：2005-08-23

申请人： Sivananda Kanakasabapathy ,  Michael Gaidis

发明人： Sivananda Kanakasabapathy ,  Michael Gaidis

IPC分类号： H01L21/336

CPC分类号： H01L43/12 ,  H01L21/76897 ,  H01L27/222 ,  H01L43/08 ,  H01L2924/3011

摘要： Techniques for forming a magnetic device are provided. In one aspect, a method of forming a via hole self-aligned with a magnetic device comprises the following steps. A dielectric layer is formed over at least a portion of the magnetic device. The dielectric layer is configured to have an underlayer proximate to the magnetic device which comprises a first material, and an overlayer on a side of the underlayer opposite the magnetic device which comprises a second material. The first material is different from the second material. In a first etching phase, a first etchant is used to etch the dielectric layer, beginning with the overlayer, and through the overlayer. In a second etching phase, a second etchant which is selective for etching the underlayer is used to etch the dielectric layer through the underlayer.

摘要翻译： 提供了用于形成磁性装置的技术。 一方面，形成与磁性装置自对准的通孔的方法包括以下步骤。 在磁性器件的至少一部分上形成电介质层。 电介质层被配置为具有靠近磁性装置的底层，其包括第一材料，并且在与包括第二材料的磁性装置相对的底层的一侧上的覆盖层。 第一种材料与第二种材料不同。 在第一蚀刻阶段中，使用第一蚀刻剂来从覆盖层开始并通过覆盖层来蚀刻介电层。 在第二蚀刻阶段中，使用用于蚀刻底层的第二蚀刻剂来蚀刻通过底层的介电层。

公开(公告)号：US20070020934A1

公开(公告)日：2007-01-25

申请号：US11177008

申请日：2005-07-08

申请人： Michael Gaidis ,  Sivananda Kanakasabapathy ,  Eugene O'Sullivan

发明人： Michael Gaidis ,  Sivananda Kanakasabapathy ,  Eugene O'Sullivan

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L43/12 ,  H01L21/0332 ,  H01L21/0337 ,  H01L27/11507 ,  H01L28/65

摘要： Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.

摘要翻译： 提供了磁性器件制造技术。 一方面，图案化至少一种，例如非挥发性材料的方法包括以下步骤。 在待图案化材料的至少一个表面上形成硬掩模结构。 硬掩模结构被配置为具有靠近材料的基部和与基部相对的顶部。 基座具有大于硬掩模结构的顶部的一个或多个横向尺寸的一个或多个横向尺寸，使得基部的至少一部分横向延伸超过顶部的实质距离。 硬掩模结构的顶部距离被蚀刻的材料比基底更大的垂直距离。 材料被蚀刻。

公开(公告)号：US20060092688A1

公开(公告)日：2006-05-04

申请号：US10977792

申请日：2004-10-29

申请人： Sivananda Kanakasabapathy ,  Yu Lu ,  Michael Gaidis

发明人： Sivananda Kanakasabapathy ,  Yu Lu ,  Michael Gaidis

IPC分类号： G11C11/00

CPC分类号： G11C11/15

摘要： Techniques for improving magnetic device performance are provided. In one aspect, a magnetic device, e.g., a magnetic random access memory device, is provided which comprises a plurality of current carrying lines; and two or more adjacent stacked magnetic toggling devices sharing at least one of the plurality of current carrying lines in common and positioned therebetween. The magnetic device is configured such that at least one of the adjacent magnetic toggling devices toggles mutually exclusively of another of the adjacent magnetic toggling devices. In an exemplary embodiment, the magnetic device comprises a plurality of levels with each of the adjacent stacked magnetic toggling devices residing in a different level.

摘要翻译： 提供了提高磁性器件性能的技术。 在一个方面，提供一种磁性装置，例如磁性随机存取存储装置，其包括多个载流线; 以及两个或更多个相邻的层叠磁性切换装置，其共同地共享多个载流线中的至少一个并且位于它们之间。 磁性装置被配置成使得至少一个相邻的磁性切换装置互相切换另一个相邻的磁性切换装置。 在示例性实施例中，磁性装置包括多个级别，其中每个相邻的层叠磁性切换装置处于不同的水平。

公开(公告)号：US20050274997A1

公开(公告)日：2005-12-15

申请号：US10710044

申请日：2004-06-15

申请人： Michael Gaidis ,  Phillip Trouilloud ,  Sivananda Kanakasabapathy ,  David Abraham

发明人： Michael Gaidis ,  Phillip Trouilloud ,  Sivananda Kanakasabapathy ,  David Abraham

IPC分类号： G11C11/15 ,  G11C11/16 ,  H01L27/22 ,  H01L31/113 ,  H01L43/12

CPC分类号： H01L43/12 ,  G11C11/15 ,  G11C11/16 ,  H01L27/222

摘要： In an MRAM cell, the writing current is encased in a low-reluctance material that is treated in one of several ways to render the material closest to the storage element ineffective to carry magnetic flux, thereby establishing a horseshoe-shaped cross section that focuses the flux toward the storage element.

摘要翻译： 在MRAM单元中，写入电流被封装在低磁阻材料中，其以几种方式之一进行处理，以使得最靠近存储元件的材料无效地携带磁通量，从而建立了马蹄形横截面，其将 向储存元件的通量。

公开(公告)号：US20050079683A1

公开(公告)日：2005-04-14

申请号：US10605604

申请日：2003-10-13

申请人： Chandrasekhar Sarma ,  Sivananda Kanakasabapathy ,  Ihar Kasko ,  Greg Costrini ,  John Hummel ,  Michael Gaidis

发明人： Chandrasekhar Sarma ,  Sivananda Kanakasabapathy ,  Ihar Kasko ,  Greg Costrini ,  John Hummel ,  Michael Gaidis

IPC分类号： G03F9/00 ,  H01L21/76 ,  H01L23/544 ,  H01L27/22

CPC分类号： H01L27/222 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for aligning an opaque, active device in a semiconductor structure includes forming an opaque layer over an optically transparent layer formed on a lower metallization level, the lower metallization level including one or more alignment marks formed therein. A portion of the opaque layer is patterned and opened corresponding to the location of the one or more alignment marks in the lower metallization level so as to render the one or more alignment marks optically visible. The opaque layer is then patterned with respect to the lower metallization level, using the optically visible one or more alignment marks.

摘要翻译： 用于对准半导体结构中的不透明有源器件的方法包括在形成在下金属化层上的光学透明层上形成不透明层，所述下金属化层包括其中形成的一个或多个对准标记。 对应于下部金属化水平中的一个或多个对准标记的位置，对不透明层的一部分进行图案化和打开，以便使一个或多个对准标记光学可见。 然后使用光学可见的一个或多个对准标记，相对于较低的金属化水平对不透明层进行图案化。

公开(公告)号：US08927365B2

公开(公告)日：2015-01-06

申请号：US13556437

申请日：2012-07-24

申请人： Veeraraghavan S. Basker ,  Sivananda Kanakasabapathy ,  Tenko Yamashita ,  Chun-Chen Yeb

发明人： Veeraraghavan S. Basker ,  Sivananda Kanakasabapathy ,  Tenko Yamashita ,  Chun-Chen Yeb

IPC分类号： H01L21/8242

CPC分类号： H01L27/10867 ,  H01L21/845 ,  H01L27/10826 ,  H01L27/1087 ,  H01L27/10879 ,  H01L27/1211

摘要： The specification and drawings present a new method, device and computer/software related product (e.g., a computer readable memory) are presented for realizing eDRAM strap formation in Fin FET device structures. Semiconductor on insulator (SOI) substrate comprising at least an insulator layer between a first semiconductor layer and a second semiconductor layer is provided. The (metal) strap formation is accomplished by depositing conductive layer on fins portion of the second semiconductor layer (Si) and a semiconductor material (polysilicon) in each DT capacitor extending to the second semiconductor layer. The metal strap is sealed by a nitride spacer to prevent the shorts between PWL and DT capacitors.

摘要翻译： 说明书和附图提出了一种新的方法，设备和计算机/软件相关产品（例如，计算机可读存储器），用于实现Fin FET器件结构中的eDRAM带形成。 提供了在第一半导体层和第二半导体层之间至少包括绝缘体层的半导体绝缘体（SOI）衬底。 （金属）带形成是通过在第二半导体层（Si）的鳍部分上沉积导电层和延伸到第二半导体层的每个DT电容器中的半导体材料（多晶硅）来实现的。 金属带由氮化物间隔物密封，以防止PWL和DT电容器之间的短路。

公开(公告)号：US08673165B2

公开(公告)日：2014-03-18

申请号：US13267198

申请日：2011-10-06

申请人： Sudharshanan Raghunathan ,  Sivananda Kanakasabapathy ,  Ryan O. Jung ,  Allen H Gabor ,  Sean D. Burns ,  Erin Catherine McLellan

发明人： Sudharshanan Raghunathan ,  Sivananda Kanakasabapathy ,  Ryan O. Jung ,  Allen H Gabor ,  Sean D. Burns ,  Erin Catherine McLellan

IPC分类号： H01L21/311

CPC分类号： H01L21/0338 ,  H01L21/0337

摘要： Embodiment of the present invention provides a method of forming a semiconductor device in a sidewall image transfer process with multiple critical dimensions. The method includes forming a multi-level dielectric layer over a plurality of mandrels, the multi-level dielectric layer having a plurality of regions covering the plurality of mandrels, the plurality of regions of the multi-level dielectric layer having different thicknesses; etching the plurality of regions of the multi-level dielectric layer into spacers by applying a directional etching process, the spacers being formed next to sidewalls of the plurality of mandrels and having different widths corresponding to the different thicknesses of the plurality of regions of the multi-level dielectric layer; removing the plurality of mandrels in-between the spacers; and transferring bottom images of the spacers into one or more layers underneath the spacers.

摘要翻译： 本发明的实施例提供了一种在具有多个关键尺寸的侧壁图像转印工艺中形成半导体器件的方法。 该方法包括在多个心轴上形成多层介质层，多层介质层具有覆盖多个心轴的多个区域，多层介质层的多个区域具有不同的厚度; 通过施加定向蚀刻工艺将多层电介质层的多个区域蚀刻成间隔物，间隔物形成在多个心轴的侧壁旁边，并且具有对应于多个区域的多个区域的不同厚度的不同宽度 电介质层; 去除间隔件之间的多个心轴; 并将间隔物的底部图像转移到间隔物下面的一个或多个层中。

公开(公告)号：US08586478B2

公开(公告)日：2013-11-19

申请号：US13424932

申请日：2012-03-20

申请人： Eiichi Soda ,  Yunpeng Yin ,  Sivananda Kanakasabapathy

发明人： Eiichi Soda ,  Yunpeng Yin ,  Sivananda Kanakasabapathy

IPC分类号： H01L21/44

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/76897

摘要： An improved method of making interconnect structures with self-aligned vias in semiconductor devices utilizes sidewall image transfer to define the trench pattern. The sidewall height acts as a sacrificial mask during etching of the via and subsequent etching of the trench, so that the underlying metal hard mask is protected. Thinner hard masks and/or a wider range of etch chemistries may thereby be utilized.

摘要翻译： 在半导体器件中制造具有自对准通孔的互连结构的改进方法利用侧壁图像转移来限定沟槽图案。 在蚀刻通孔和​​随后蚀刻沟槽期间，侧壁高度用作牺牲掩模，使得下面的金属硬掩模被保护。 因此可以利用更薄的硬掩模和/或更广泛的蚀刻化学物质。