公开(公告)号：US07848167B2

公开(公告)日：2010-12-07

申请号：US12255622

申请日：2008-10-21

申请人： Soo-yong Park ,  Boon-Aik Ang ,  Steve Choi

发明人： Soo-yong Park ,  Boon-Aik Ang ,  Steve Choi

IPC分类号： G11C7/02 ,  G11C7/10 ,  G11C7/06

CPC分类号： G11C5/147 ,  G05F1/56 ,  G11C8/10 ,  G11C16/30

摘要： A voltage regulator is provided. The voltage regulator provides an output voltage that is proportional to a digital multi-bit select signal. The voltage regulator includes a coarse voltage regulator and a fine voltage regulator. The coarse voltage regulator provides a coarse output voltage based on an output of a voltage divider selected based on the most significant bits of the select signal. The fine voltage regulator provides the output voltage from the coarse output voltage. The output of the fine voltage regulator is adjusted by adjusting the output of an adjustable current source that is provided to a resistor that is coupled between the output and one of the inputs of the fine voltage regulator.

摘要翻译： 提供电压调节器。 电压调节器提供与数字多位选择信号成比例的输出电压。 电压调节器包括粗调电压调节器和精密电压调节器。 粗电压调节器基于基于选择信号的最高有效位选择的分压器的输出提供粗略的输出电压。 精细电压调节器提供粗输出电压的输出电压。 微调电压调节器的输出通过调节可调电流源的输出来调节，该可调电流源提供给耦合在输出端和精密电压调节器的一个输入端之间的电阻器。

公开(公告)号：US20100039095A1

公开(公告)日：2010-02-18

申请号：US12228691

申请日：2008-08-15

申请人： Boon-Aik Ang ,  Soo-yong Park ,  Steve Choi

发明人： Boon-Aik Ang ,  Soo-yong Park ,  Steve Choi

IPC分类号： G01R19/00

CPC分类号： G11C29/50 ,  G11C16/04 ,  G11C29/028 ,  G11C2029/5006

摘要： In the present method of measuring the current of a first current source, the current thereof may be combined with either the current of a second current source, or the current of a third current source. Based on a combination of the current of the first current source and either (a) the current of the second current source or (b) the current of the third current source, a digital output is provided. If this digital output is of a first value, the state of combining the current of the first current source with the current of the second current source becomes in effect. If this digital output is of a second value, the state of combining the current of the first current source with the current of the second current source becomes in effect.

摘要翻译： 在本测量第一电流源的电流的方法中，其电流可以与第二电流源的电流或第三电流源的电流组合。 基于第一电流源的电流和（a）第二电流源的电流或（b）第三电流源的电流的组合，提供数字输出。 如果该数字输出是第一值，则将第一电流源的电流与第二电流源的电流组合的状态变为有效。 如果该数字输出是第二值，则将第一电流源的电流与第二电流源的电流组合的状态变为有效。

公开(公告)号：US08581595B2

公开(公告)日：2013-11-12

申请号：US12228691

申请日：2008-08-15

申请人： Boon-Aik Ang ,  Soo-yong Park ,  Steve Choi

发明人： Boon-Aik Ang ,  Soo-yong Park ,  Steve Choi

IPC分类号： G01R31/08

CPC分类号： G11C29/50 ,  G11C16/04 ,  G11C29/028 ,  G11C2029/5006

摘要： In the present method of measuring the current of a first current source, the current thereof may be combined with either the current of a second current source, or the current of a third current source. Based on a combination of the current of the first current source and either (a) the current of the second current source or (b) the current of the third current source, a digital output is provided. If this digital output is of a first value, the state of combining the current of the first current source with the current of the second current source becomes in effect. If this digital output is of a second value, the state of combining the current of the first current source with the current of the second current source becomes in effect.

摘要翻译： 在本测量第一电流源的电流的方法中，其电流可以与第二电流源的电流或第三电流源的电流组合。 基于第一电流源的电流和（a）第二电流源的电流或（b）第三电流源的电流的组合，提供数字输出。 如果该数字输出是第一值，则将第一电流源的电流与第二电流源的电流组合的状态变为有效。 如果该数字输出是第二值，则将第一电流源的电流与第二电流源的电流组合的状态变为有效。

公开(公告)号：US20100097876A1

公开(公告)日：2010-04-22

申请号：US12255622

申请日：2008-10-21

申请人： Soo-Yong Park ,  Boon-Aik Ang ,  Steve Choi

发明人： Soo-Yong Park ,  Boon-Aik Ang ,  Steve Choi

IPC分类号： G11C5/14 ,  G05F1/10

CPC分类号： G11C5/147 ,  G05F1/56 ,  G11C8/10 ,  G11C16/30

摘要： A voltage regulator is provided. The voltage regulator provides an output voltage that is proportional to a digital multi-bit select signal. The voltage regulator includes a coarse voltage regulator and a fine voltage regulator. The coarse voltage regulator provides a coarse output voltage based on an output of a voltage divider selected based on the most significant bits of the select signal. The fine voltage regulator provides the output voltage from the coarse output voltage. The output of the fine voltage regulator is adjusted by adjusting the output of an adjustable current source that is provided to a resistor that is coupled between the output and one of the inputs of the fine voltage regulator.

摘要翻译： 提供电压调节器。 电压调节器提供与数字多位选择信号成比例的输出电压。 电压调节器包括粗调电压调节器和精密电压调节器。 粗电压调节器基于基于选择信号的最高有效位选择的分压器的输出提供粗略的输出电压。 精细电压调节器提供粗输出电压的输出电压。 微调电压调节器的输出通过调节可调电流源的输出来调节，该可调电流源提供给耦合在输出端和精密电压调节器的一个输入端之间的电阻器。

公开(公告)号：US20080122413A1

公开(公告)日：2008-05-29

申请号：US11423643

申请日：2006-06-12

申请人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

发明人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

IPC分类号： G05F1/10 ,  G01R19/00

CPC分类号： G11C5/143 ,  G01R19/16552

摘要： A method and apparatus are provided for versatile high voltage level detection. A semiconductor device (100) is provided which includes a high voltage generating circuit (202) for generating a high voltage supply signal having a high voltage level and a voltage level detector (204) coupled to the output of the high voltage generating circuit (202) and including a current source (402) for generating a current to increase the voltage margin of the voltage level detector (204), the voltage level detector (204) generating a voltage control signal in response to the current and the high voltage level detected.

摘要翻译： 提供了用于通用的高电压电平检测的方法和装置。 提供一种半导体器件（100），其包括用于产生具有高电压电平的高电压电源信号的高电压产生电路（202）和耦合到高电压发生电路（202）的输出的电压电平检测器（204） ），并且包括用于产生电流以增加电压电平检测器（204）的电压余量的电流源（402），电压电平检测器（204）响应于检测到的电流和高电压产生电压控制信号 。

公开(公告)号：US20050270217A1

公开(公告)日：2005-12-08

申请号：US11011510

申请日：2004-12-14

申请人： Meei-Ling Chiang ,  Boon-Aik Ang

发明人： Meei-Ling Chiang ,  Boon-Aik Ang

IPC分类号： H03M1/00 ,  H03M1/06 ,  H03M1/16 ,  H03M1/18 ,  H03M1/38 ,  H03M1/44

CPC分类号： H03M1/007 ,  H03M1/0695 ,  H03M1/167 ,  H03M1/44

摘要： A pipeline ADC (Analog to Digital Converter) unit is provided that has a first and a second multi-stage portion. The first multi-stage portion has a first plurality of converter stages for converting a first analog signal to a first digital signal having a first digital resolution. The second portion has a second plurality of converter stages to convert a second analog signal to a second digital signal having a second digital resolution. The second plurality includes the first plurality. The pipeline ADC unit selectively uses either the first plurality of stages alone, or the second plurality. The pipeline ADC unit may be used in a WLAN (Wireless Local Area Network) communication device.

摘要翻译： 提供了具有第一和第二多级部分的流水线ADC（模数转换器）单元。 第一多级部分具有用于将第一模拟信号转换为具有第一数字分辨率的第一数字信号的第一多个转换器级。 第二部分具有第二多个转换器级，以将第二模拟信号转换成具有第二数字分辨率的第二数字信号。 第二多个包括第一多个。 流水线ADC单元选择性地使用单独的第一多个级或第二级。 流水线ADC单元可用于WLAN（无线局域网）通信设备中。

公开(公告)号：US07675805B2

公开(公告)日：2010-03-09

申请号：US12006744

申请日：2008-01-04

申请人： Boon-Aik Ang ,  Derric J. H. Lewis

发明人： Boon-Aik Ang ,  Derric J. H. Lewis

IPC分类号： G11C11/00

CPC分类号： G11C16/30 ,  G11C16/0458 ,  G11C16/0475

摘要： Systems and methods of regulating voltage at a memory cell are disclosed. An address for the memory cell is determined. Table lookups based on the address are performed. The table lookups yield voltage compensation parameters that can be used to set voltages on the terminals (e.g., source and drain) of the memory cell.

摘要翻译： 公开了一种在存储器单元上调节电压的系统和方法。 确定存储单元的地址。 执行基于地址的表查找。 表查找产生可用于设置存储器单元的端子（例如，源极和漏极）上的电压的电压补偿参数。

公开(公告)号：US20090175112A1

公开(公告)日：2009-07-09

申请号：US12006744

申请日：2008-01-04

申请人： Boon-Aik Ang ,  Derric J.H. Lewis

发明人： Boon-Aik Ang ,  Derric J.H. Lewis

IPC分类号： G11C5/14

CPC分类号： G11C16/30 ,  G11C16/0458 ,  G11C16/0475

摘要： Systems and methods of regulating voltage at a memory cell are disclosed. An address for the memory cell is determined. Table lookups based on the address are performed. The table lookups yield voltage compensation parameters that can be used to set voltages on the terminals (e.g., source and drain) of the memory cell.

摘要翻译： 公开了一种在存储器单元上调节电压的系统和方法。 确定存储单元的地址。 执行基于地址的表查找。 表查找产生可用于设置存储器单元的端子（例如，源极和漏极）上的电压的电压补偿参数。

公开(公告)号：US07355904B2

公开(公告)日：2008-04-08

申请号：US11423645

申请日：2006-06-12

申请人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

发明人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

IPC分类号： G11C7/00

CPC分类号： G11C5/145

摘要： A method and apparatus are provided for improved noise reduction from switching on and off drain pumps (202) in a high voltage generator. The drain pumps (202) are divided into groups (204) and activation of the groups (204) of drain pumps (202) is staggered (304, 310). In addition, when drain pumps are switched on and off for power conservation or to maintain a steady state high voltage level, the groups (204) of drain pumps (202) are switched on and off in response to various predetermined high voltage levels (410, 412, 414, 416), with different voltage levels for different groups (204) of drain pumps (202).

摘要翻译： 提供了一种方法和装置，用于从高压发生器中的接通和关闭排放泵（202）的开启和关闭状态改进降噪。 排水泵（202）被分成组（204），并且排水泵（202）的组（204）的活动是交错的（304,310）。 此外，当排水泵被接通和关闭以进行节能或保持稳定状态的高电压电平时，排水泵（202）的组（204）响应于各种预定的高电压电平（410）被接通和断开 ，412,414,416），具有用于不同组（204）排水泵（202）的不同电压电平。

公开(公告)号：US06424630B1

公开(公告)日：2002-07-23

申请号：US09182524

申请日：1998-10-30

申请人： Boon-Aik Ang

发明人： Boon-Aik Ang

IPC分类号： H04L100

CPC分类号： H04L25/06

摘要： A physical layer transceiver of a home network station connected to a telephone medium has an architecture enabling adaptation of detection circuitry based on received network signals to enable reliable recovery of data signals. The physical layer transceiver includes an input amplifier that amplifies network signals according to one of 128 gain settings set by a receiver gain control signal. A signal conditioning circuit includes an envelope detector configured for outputting an envelope of the amplified received signal, and an energy detector configured for outputting an energy signal of the amplified received signals. The envelope signal and the energy signal are supplied to slicer threshold circuits, configured for outputting noise, peak, data event and energy event signals based on noise threshold, peak threshold, data transition threshold, and energy threshold signals, respectively. A digital controller controls the input amplifier gain and the threshold values, and adjusts the gain and threshold values based on the noise event signal and the peak event signal within an access ID (AID) interval. The physical layer transceiver also includes a calibration circuit for calibrating a common mode voltage reference signal in the physical layer transceiver to a minimum noise threshold level while isolating any network signals from the physical layer transceiver. The common mode voltage signal is initially set at a maximum value and supplied to the noise slicer threshold circuit. The common mode voltage signal is successively decreased until the common mode voltage signal falls below the minimum noise slice threshold. The calibrated value corresponds to the common mode voltage signal configuration setting at the time the noise slicer threshold circuit transitions from a 1 to a zero. Calibration insures that the baseline of the envelope signal is within 20 millivolts of the minimum noise slicer threshold during operation.