公开(公告)号：US07268037B2

公开(公告)日：2007-09-11

申请号：US11040091

申请日：2005-01-24

申请人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schröder ,  Matthias Goldbach

发明人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schröder ,  Matthias Goldbach

IPC分类号： H01L21/8242

CPC分类号： H01L27/1087 ,  H01L21/31111 ,  H01L21/3141 ,  H01L21/31616 ,  H01L29/66181

摘要： A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the aluminum oxide. Finally, the aluminum oxide is selectively removed again, for example using hot phosphoric acid. Sections of the semiconductor surface which are formed from silicon, silicon oxide or silicon nitride remain in place on the wafer.

摘要翻译： 用于修改半导体部分的方法包括覆盖这些部分以保持不掺杂金属氧化物，例如氧化铝。 然后，在未被氧化铝覆盖的那些部分中，例如从气相掺杂半导体。 最后，再次选择性地除去氧化铝，例如使用热磷酸。 由硅，氧化硅或氮化硅形成的半导体表面的部分保留在晶片上。

公开(公告)号：US07176514B2

公开(公告)日：2007-02-13

申请号：US10413812

申请日：2003-04-15

申请人： Thomas Hecht ,  Albert Birner ,  Harald Seidl ,  Uwe Schröder ,  Stefan Jakschik ,  Martin Gutsche

发明人： Thomas Hecht ,  Albert Birner ,  Harald Seidl ,  Uwe Schröder ,  Stefan Jakschik ,  Martin Gutsche

IPC分类号： H01L27/108 ,  H01L21/76

CPC分类号： H01L21/02238 ,  C25D11/02 ,  C25D11/32 ,  H01L21/02258 ,  H01L21/31675 ,  H01L21/31687 ,  H01L27/1085

摘要： A method for producing a dielectric layer on a substrate made of a conductive substrate material includes reducing a leakage current that flows through defects of the dielectric layer at least by a self-aligning and self-limiting electrochemical conversion of the conductive substrate material into a nonconductive substrate follow-up material in sections of the substrate that are adjacent to the defects. Also provided is a configuration including a dielectric layer with defects, a substrate made of a conductive substrate material, and reinforcement regions made of the nonconductive substrate follow-up material in sections adjacent to the defects.

摘要翻译： 用于在由导电基板材料制成的基板上制造介电层的方法包括至少通过导电基板材料的自对准和自限制电化学转换为不导电的方式减少流过电介质层的缺陷的漏电流 衬底跟随材料在与缺陷相邻的衬底的部分中。 还提供了包括具有缺陷的电介质层，由导电基板材料制成的基板以及由与该缺陷相邻的部分中的非导电性基板追随材料制成的加强区域的结构。

公开(公告)号：US07358187B2

公开(公告)日：2008-04-15

申请号：US11147892

申请日：2005-06-08

申请人： Thomas Hecht ,  Stefan Jakschik ,  Uwe Schröder

发明人： Thomas Hecht ,  Stefan Jakschik ,  Uwe Schröder

IPC分类号： H01L21/31 ,  H01L21/44

CPC分类号： C23C16/0281 ,  C23C14/046 ,  C23C16/045 ,  H01L21/0228 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/76877 ,  H01L22/26

摘要： The present invention provides a coating process for patterned substrate surfaces, in which a substrate (101) is provided, the substrate having a surface (105) which is patterned in a substrate patterning region (102) and has one or more trenches (106) that are to be filled to a predetermined filling height (205), a catalyst layer (201) is introduced into the trenches (106) that are to be filled, a reaction layer (202) is deposited catalytically in the trenches (106) that are to be filled, the catalytically deposited reaction layer (202) is densified in the trenches (106) that are to be filled, and the introduction of the catalyst layer (201) and the catalytic deposition of the reaction layer (202) are repeated until the trenches (106) that are to be filled have been filled to the predetermined filling height (205).

摘要翻译： 本发明提供一种用于图案化衬底表面的涂覆方法，其中提供衬底（101），该衬底具有在衬底图案化区域（102）中被图案化并具有一个或多个沟槽（106）的表面（105） 将其填充到预定的填充高度（205），将催化剂层（201）引入要填充的沟槽（106）中，在沟槽（106）中催化沉积反应层（202），其中 要填充的催化沉积反应层（202）在要填充的沟槽（106）中致密化，并且重复引入催化剂层（201）和催化沉积反应层（202） 直到要填充的沟槽（106）已经被填充到预定填充高度（205）。

公开(公告)号：US07307735B2

公开(公告)日：2007-12-11

申请号：US10835259

申请日：2004-04-30

申请人： Thomas Hecht ,  Uwe Schröder ,  Ulrich Mantz ,  Stefan Jakschik ,  Andreas Orth

发明人： Thomas Hecht ,  Uwe Schröder ,  Ulrich Mantz ,  Stefan Jakschik ,  Andreas Orth

IPC分类号： G01B11/02

CPC分类号： G01N21/211 ,  G01B11/22 ,  G01J3/453

摘要： The present invention relates to a method for determining the depth of a buried structure in a semiconductor wafer. According to the invention, the layer behavior of the semiconductor wafer which is brought about by the buried structure when the semiconductor wafer is irradiated with electromagnetic radiation in the infrared range and arises as a result of the significantly longer wavelengths of the radiation used in comparison with the lateral dimensions of the buried structure is utilized to determine the depth of the buried structure by spectrometric and/or ellipsometric methods.

摘要翻译： 本发明涉及一种用于确定半导体晶片中的掩埋结构的深度的方法。 根据本发明，当半导体晶片在红外范围内被电磁辐射照射时，由掩埋结构引起的半导体晶片的层行为，并且由于与所使用的辐射相比显着更长的辐射波长而产生 掩埋结构的横向尺寸用于通过光谱测量和/或椭偏方法确定掩埋结构的深度。

公开(公告)号：US06953722B2

公开(公告)日：2005-10-11

申请号：US10425461

申请日：2003-04-29

申请人： Harald Seidl ,  Martin Gutsche ,  Thomas Hecht ,  Stefan Jakschik ,  Stephan Kudelka ,  Uwe Schröder ,  Matthias Schmeide

发明人： Harald Seidl ,  Martin Gutsche ,  Thomas Hecht ,  Stefan Jakschik ,  Stephan Kudelka ,  Uwe Schröder ,  Matthias Schmeide

IPC分类号： H01L21/311 ,  H01L21/8242

CPC分类号： H01L27/10867 ,  H01L21/31133

摘要： In a method for forming patterned ceramic layers, a ceramic material is deposited on a substrate and is subsequently densified by heat treatment, for example. In this case, the initially amorphous material is converted into a crystalline or polycrystalline form. In order that the now crystalline material can be removed again from the substrate, imperfections are produced in the ceramic material, for example by ion implantation. As a result, the etching medium can more easily attack the ceramic material, so that the latter can be removed with a higher etching rate. Through inclined implantation, the method can be performed in a self-aligning manner and the ceramic material can be removed on one side, by way of example, in trenches or deep trench capacitors.

摘要翻译： 在用于形成图案化陶瓷层的方法中，陶瓷材料沉积在基底上，并随后通过热处理致密化。 在这种情况下，最初的无定形材料被转化为结晶或多晶形式。 为了现在的结晶材料可以再次从衬底去除，例如通过离子注入在陶瓷材料中产生缺陷。 结果，蚀刻介质可以更容易地侵蚀陶瓷材料，使得后者可以以更高的蚀刻速率被去除。 通过倾斜注入，该方法可以以自对准的方式进行，并且陶瓷材料可以通过例如在沟槽或深沟槽电容器中被一侧除去。

公开(公告)号：US07344953B2

公开(公告)日：2008-03-18

申请号：US11042326

申请日：2005-01-26

申请人： Thomas Hecht ,  Matthias Goldbach ,  Uwe Schröder

发明人： Thomas Hecht ,  Matthias Goldbach ,  Uwe Schröder

IPC分类号： H01L21/20

CPC分类号： C23C16/045 ,  C23C16/45525 ,  H01L21/3065 ,  H01L21/3141 ,  H01L27/10808 ,  H01L27/10829 ,  H01L27/10852 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： On a substrate surface, which has been patterned in the form of a relief, of a substrate, typically of a semiconductor wafer, a deposition process is used to provide a covering layer on process surfaces which are vertical or inclined with respect to the substrate surface. The covering layer is patterned in a direction which is vertical with respect to the substrate surface by limiting a process quantity of at least one precursor material and/or by temporarily limiting the deposition process, and is formed as a functional layer or mask for subsequent process steps.

摘要翻译： 在通常为半导体晶片的衬底（其形式为浮雕形式的衬底表面）上，使用沉积工艺来提供在相对于衬底表面垂直或倾斜的工艺表面上的覆盖层 。 通过限制至少一种前体材料的工艺量和/或通过临时限制沉积工艺，将覆盖层图案化成相对于衬底表面垂直的方向，并形成为后续工艺的功能层或掩模 脚步。

公开(公告)号：US06693016B2

公开(公告)日：2004-02-17

申请号：US10233690

申请日：2002-09-03

申请人： Martin Gutsche ,  Thomas Hecht ,  Matthias Leonhardt ,  Uwe Schröder ,  Harald Seidl

发明人： Martin Gutsche ,  Thomas Hecht ,  Matthias Leonhardt ,  Uwe Schröder ,  Harald Seidl

IPC分类号： H01L2120

CPC分类号： H01L27/10861

摘要： The novel trench capacitors have a constant or increased capacitance. Materials for a second electrode region and if appropriate a first electrode region include a metallic material, a metal nitride, or the like, and/or a dielectric region is formed with a material with an increased dielectric constant. An insulation region is formed in the upper wall region of the trench after the first electrode region or the second electrode region has been formed, by selective and local oxidation.

摘要翻译： 新颖的沟槽电容器具有恒定或增加的电容。 第二电极区域的材料和适当的第一电极区域包括金属材料，金属氮化物等，和/或介电区域由介电常数增加的材料形成。 通过选择性和局部氧化，在形成第一电极区域或第二电极区域之后，在沟槽的上壁区域中形成绝缘区域。

公开(公告)号：US06645839B2

公开(公告)日：2003-11-11

申请号：US10139165

申请日：2002-05-06

申请人： Moritz Haupt ,  Anja Morgenschweis ,  Dietmar Ottenwälder ,  Uwe Schröder

发明人： Moritz Haupt ,  Anja Morgenschweis ,  Dietmar Ottenwälder ,  Uwe Schröder

IPC分类号： H01L2138

CPC分类号： H01L21/223 ,  H01L27/1087 ,  Y10S438/914 ,  Y10S438/923

摘要： A method for improving a doping profile using gas phase doping is described. In the method, silicon nitride and/or products of decomposition from a silicon nitride deposition are introduced in a process chamber before or during the actual gas phase doping. This allows the doping profile to be significantly improved.

摘要翻译： 描述了使用气相掺杂改善掺杂分布的方法。 在该方法中，氮化硅和/或氮化硅沉积的分解产物在实际气相掺杂之前或期间被引入处理室中。 这允许显着改善掺杂分布。