公开(公告)号：US06740595B2

公开(公告)日：2004-05-25

申请号：US10122996

申请日：2002-04-12

申请人： Stephan Kudelka ,  Helmut Tews ,  Alexander Michaelis ,  Uwe Schroeder ,  Martin Popp ,  Kristin Schupke ,  Daniel Koehler

发明人： Stephan Kudelka ,  Helmut Tews ,  Alexander Michaelis ,  Uwe Schroeder ,  Martin Popp ,  Kristin Schupke ,  Daniel Koehler

IPC分类号： H01L21311

CPC分类号： H01L27/1087 ,  H01L21/30604 ,  H01L27/10829 ,  H01L29/66181

摘要： A method for eching a recess in a polysilicon region of a semiconductor device by applying a solution of NH4OH in water to the polysilicon.

摘要翻译： 一种通过将NH 4 OH溶液施加到多晶硅中来捕获半导体器件的多晶硅区域中的凹陷的方法。

公开(公告)号：US06599798B2

公开(公告)日：2003-07-29

申请号：US09910771

申请日：2001-07-24

申请人： Helmut Tews ,  Stephan Kudelka ,  Uwe Schroeder ,  Rolf Weis

发明人： Helmut Tews ,  Stephan Kudelka ,  Uwe Schroeder ,  Rolf Weis

IPC分类号： H01L218242

CPC分类号： H01L27/1087 ,  H01L21/76205 ,  H01L21/76235 ,  H01L27/10867 ,  H01L29/945

摘要： The vertical DRAM capacitor with a buried LOCOS collar characterized by: a self-aligned bottle and gas phase doping; no consumption of silicon at the depth of the buried strap; no reduction of trench diameter; and a nitride layer to protect trench sidewalls during gas phase doping.

摘要翻译： 垂直DRAM电容器具有埋置的LOCOS环，其特征在于：自对准瓶和气相掺杂; 掩埋带深度不消耗硅; 没有减小沟槽直径; 以及在气相掺杂期间保护沟槽侧壁的氮化物层。

公开(公告)号：US06498061B2

公开(公告)日：2002-12-24

申请号：US09730674

申请日：2000-12-06

申请人： Rama Divakaruni ,  Stephan Kudelka ,  Helmut Tews ,  Irene McStay ,  Kil-Ho Lee ,  Uwe Schroeder

发明人： Rama Divakaruni ,  Stephan Kudelka ,  Helmut Tews ,  Irene McStay ,  Kil-Ho Lee ,  Uwe Schroeder

IPC分类号： H01L218242

CPC分类号： H01L27/10867

摘要： A process for fabricating a single-sided semiconductor deep trench structure filled with polysilicon trench fill material includes the following steps. Form a thin film, silicon nitride, barrier layer over the trench fill material. Deposit a thin film of an amorphous silicon masking layer over the barrier layer. Perform an angled implant into portions of the amorphous silicon masking layer which are not in the shadow of the deep trench. Strip the undoped portions of the amorphous silicon masking layer from the deep trench. Then strip the newly exposed portions of barrier layer exposing a part of the trench fill polysilicon surface and leaving the doped, remainder of the amorphous silicon masking layer exposed. Counterdope the exposed part of the trench fill material. Oxidize exposed portions of the polysilicon trench fill material, and then strip the remainder of the masking layer.

摘要翻译： 用于制造填充有多晶硅沟槽填充材料的单面半导体深沟槽结构的工艺包括以下步骤。 在沟槽填充材料上形成薄膜，氮化硅，阻挡层。 在阻挡层上沉积非晶硅掩模层的薄膜。 对非深度沟槽阴影的非晶硅掩模层的部分进行成角度的注入。 从深沟槽剥离非晶硅掩模层的未掺杂部分。 然后剥离暴露部分沟槽填充多晶硅表面的势垒层的新暴露部分，并且使非晶硅掩模层的掺杂剩余部分露出。 反映出暴露部分的沟槽填充材料。 氧化多晶硅沟槽填充材料的暴露部分，然后剥离掩模层的其余部分。

公开(公告)号：US06573137B1

公开(公告)日：2003-06-03

申请号：US09603442

申请日：2000-06-23

申请人： Ramachandra Divakaruni ,  Jack A. Mandelman ,  Wolfgang Bergner ,  Gary B. Bronner ,  Ulrike Gruening ,  Stephan Kudelka ,  Alexander Michaelis ,  Larry Nesbit ,  Carl J. Radens ,  Till Schloesser ,  Helmut Tews

发明人： Ramachandra Divakaruni ,  Jack A. Mandelman ,  Wolfgang Bergner ,  Gary B. Bronner ,  Ulrike Gruening ,  Stephan Kudelka ,  Alexander Michaelis ,  Larry Nesbit ,  Carl J. Radens ,  Till Schloesser ,  Helmut Tews

IPC分类号： H01L218242

CPC分类号： H01L27/10864

摘要： A method for clearing an isolation collar from a first interior surface of a deep trench at a location above a storage capacitor while leaving the isolation collar at other surfaces of the deep trench. A barrier material is deposited above a node conductor of the storage capacitor. A layer of silicon is deposited over the barrier material. Dopant ions are implanted at an angle into the layer of deposited silicon within the deep trench, thereby leaving the deposited silicon unimplanted along one side of the deep trench. The unimplanted silicon is etched. The isolation collar is removed in locations previously covered by the unimplanted silicon, leaving the isolation collar in locations covered by the implanted silicon.

摘要翻译： 一种用于在存储电容器上方的位置处从深沟槽的第一内表面清除隔离环的方法，同时将隔离套环留在深沟槽的其它表面。 屏蔽材料沉积在存储电容器的节点导体上方。 一层硅沉积在阻挡材料上。 掺杂离子以一定角度注入到深沟槽内沉积的硅层中，从而留下沉积的硅沿着深沟槽的一侧被植入。 未投影的硅被蚀刻。 隔离套环在先前被未投影硅覆盖的位置上移除，使隔离环位于植入硅覆盖的位置。

公开(公告)号：US06426253B1

公开(公告)日：2002-07-30

申请号：US09576465

申请日：2000-05-23

申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Brian S. Lee ,  Uwe Schroeder ,  Stephan Kudelka

发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Brian S. Lee ,  Uwe Schroeder ,  Stephan Kudelka

IPC分类号： H01L218242

CPC分类号： H01L27/10864 ,  H01L21/76237 ,  H01L21/823487 ,  H01L27/10841 ,  H01L27/10867

摘要： A system and method of forming an electrical connection (142) to the interior of a deep trench (104) in an integrated circuit utilizing a low-angle dopant implantation (114) to create a self-aligned mask over the trench. The electrical connection preferably connects the interior plate (110) of a trench capacitor to a terminal of a vertical trench transistor. The low-angle implantation process, in combination with a low-aspect ratio mask structure, generally enables the doping of only a portion of a material overlying or in the trench. The material may then be subjected to a process step, such as oxidation, with selectivity between the doped and undoped regions. Another process step, such as an etch process, may then be used to remove a portion of the material (120) overlying or in the trench, leaving a self-aligned mask (122) covering a portion of the trench, and the remainder of the trench exposed for further processing. Alternatively, an etch process alone, with selectivity between the doped and undoped regions, may be used to create the mask. The self-aligned mask then allows for the removal of selective portions of the materials in the trench so that a vertical trench transistor and a buried strap may be formed on only one side of the trench.

摘要翻译： 使用低角度掺杂剂注入（114）在集成电路中形成到深沟槽（104）的内部的电连接（142）的系统和方法，以在沟槽上产生自对准掩模。 电连接优选地将沟槽电容器的内板（110）连接到垂直沟槽晶体管的端子。 低角度注入工艺与低纵横比掩模结构相结合，通常能够仅掺杂覆盖或在沟槽中的材料的一部分。 然后可以在掺杂区域和未掺杂区域之间选择性地对材料进行处理步骤，例如氧化。 然后可以使用诸如蚀刻工艺的另一工艺步骤来去除覆盖在沟槽中或在沟槽中的部分材料（120），留下覆盖沟槽的一部分的自对准掩模（122），并且其余部分 沟槽暴露进一步加工。 或者，可以使用仅在掺杂区域和未掺杂区域之间具有选择性的蚀刻工艺来产生掩模。 自对准掩模然后允许去除沟槽中的材料的选择性部分，使得可以仅在沟槽的一侧上形成垂直沟槽晶体管和掩埋带。

公开(公告)号：US06335247B1

公开(公告)日：2002-01-01

申请号：US09597389

申请日：2000-06-19

申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Brian S. Lee

发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Brian S. Lee

IPC分类号： H01L21336

CPC分类号： H01L27/10864 ,  H01L27/10876

摘要： A method of forming a vertically-oriented device in an integrated circuit using a selective wet etch to remove only a part of the sidewalls in a deep trench, and the device formed therefrom. While a portion of the trench perimeter (e.g., isolation collar 304) is protected by a mask (e.g., polysilicon 318), the exposed portion is selectively wet etched to remove selected crystal planes from the exposed portion of the trench, leaving a flat substrate sidewall (324) with a single crystal plane. A single side vertical trench transistor may be formed on the flat sidewall. A vertical gate oxide (e.g. silicon dioxide 330) of the transistor formed on the single crystal plane is substantially uniform across the transistor channel, providing reduced chance of leakage and consistent threshold voltages from device to device. In addition, trench widening is substantially reduced, increasing the device to device isolation distance in a single sided buried strap junction device layout.

摘要翻译： 一种使用选择性湿蚀刻在集成电路中形成垂直取向器件的方法，以仅去除深沟槽中的一部分侧壁，以及由此形成的器件。 虽然沟槽周边的一部分（例如，隔离环304）被掩模（例如，多晶硅318）保护，但是暴露部分被选择性地湿蚀刻以从沟槽的暴露部分移除所选择的晶面，留下平坦的衬底 侧壁（324）与单晶面。 单侧垂直沟槽晶体管可以形成在平坦侧壁上。 形成在单晶平面上的晶体管的垂直栅极氧化物（例如二氧化硅330）在晶体管沟道上基本上是均匀的，从而降低了泄漏的机会和从器件到器件的一致的阈值电压。 此外，沟槽加宽大大降低，从而在单面掩埋带接合器件布局中将器件增加到器件隔离距离。

公开(公告)号：US06605860B1

公开(公告)日：2003-08-12

申请号：US09597442

申请日：2000-06-20

申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

IPC分类号： H01L2906

CPC分类号： H01L21/28202 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02255 ,  H01L21/2822 ,  H01L21/3144 ,  H01L21/31658 ,  H01L27/10864 ,  H01L29/045 ,  H01L29/42368 ,  H01L29/512 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66666 ,  H01L29/7827 ,  Y10S257/905

摘要： A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of bon axis. A trench is formed in a surface of the silicon body, such trench having sidewalls disposed in different crystallographic planes, one of such planes being the crystallographic plane and another one of such planes being the plane. A substantially uniform layer of silicon nitride is formed on the sidewalls. The trench, with the with substantially uniform layer of silicon nitride, is subjected to a silicon oxidation environment with sidewalls in the plane being oxidized at a higher rate than sidewalls in the plane producing silicon dioxide on the silicon nitride layer having thickness over the plane greater than over the plane. The silicon dioxide is subjected to an etch to selectively remove silicon dioxide while leaving substantially un-etched silicon nitride to thereby remove portions of the silicon dioxide over the plane and to thereby expose underlying portions of the silicon nitride material while leaving portions of the silicon dioxide over the plane on underlying portions of the silicon nitride material. Exposed portions of the silicon nitride material are selectively removed to expose underlying portions of the sidewalls of the trench disposed in the plane while leaving substantially un-etched portions of the silicon nitride material disposed on sidewalls of the trench disposed in the plane. The structure is then subjected to an silicon oxidation environment to produce the substantially uniform silicon dioxide layer on the sidewalls of the trench.

摘要翻译： 一种在硅主体上形成基本上均匀的厚的热生长二氧化硅材料的方法，其独立于凸轮轴。 沟槽形成在硅体的表面中，这样的沟槽具有设置在不同结晶平面中的侧壁，这些平面中的一个是100晶体平面，另外一个这样的平面是“10”平面。 在侧壁上形成基本均匀的氮化硅层。 具有基本上均匀的氮化硅层的沟槽经受硅氧化环境，其中<110>面中的侧壁以比在100平面中的侧壁更高的速率被氧化，在氮化硅层上产生二氧化硅 具有比<110>平面上的厚度大于超过<100>平面的厚度。 对二氧化硅进行蚀刻以选择性地去除二氧化硅，同时留下基本未蚀刻的氮化硅，从而在<100>平面上除去二氧化硅的一部分，从而暴露氮化硅材料的下面部分，同时留下部分 在氮化硅材料的下面部分上的<110>面上的二氧化硅。 选择性地去除氮化硅材料的暴露部分以暴露设置在<100>平面中的沟槽的侧壁的下面部分，同时留下设置在设置在<110>平面中的沟槽的侧壁上的氮化硅材料的基本上未蚀刻的部分 >飞机。 然后将该结构进行硅氧化环境以在沟槽的侧壁上产生基本均匀的二氧化硅层。

公开(公告)号：US06740555B1

公开(公告)日：2004-05-25

申请号：US09408248

申请日：1999-09-29

申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

IPC分类号： H01L218242

CPC分类号： H01L21/28202 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02255 ,  H01L21/2822 ,  H01L21/3144 ,  H01L21/31658 ,  H01L27/10864 ,  H01L29/045 ,  H01L29/42368 ,  H01L29/512 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66666 ,  H01L29/7827 ,  Y10S257/905

摘要： A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of axis. A trench is formed in a surface of the silicon body, such trench having sidewalls disposed in different crystallographic planes, one of such planes being the crystallographic plane and another one of such planes being the plane. A substantially uniform layer of silicon nitride is formed on the sidewalls. The trench, with the substantially uniform layer of silicon nitride, is subjected to a silicon oxidation environment with sidewalls in the plane being oxidized at a higher rate than sidewalls in the plane producing silicon dioxide on the silicon nitride layer having thickness over the plane greater than over the plane. The silicon dioxide is subjected to an etch to selectively remove silicon dioxide while leaving substantially un-etched silicon nitride to thereby remove portions of the silicon dioxide over the plane and to thereby expose underlying portions of the silicon nitride material while leaving portions of the silicon dioxide over the plane on underlying portions of the silicon nitride material. Exposed portions of the silicon nitride material are selectively removed to expose underlying portions of the sidewalls of the trench disposed in the plane while leaving substantially un-etched portions of the silicon nitride material disposed on sidewalls of the trench disposed in the plane. The structure is then subjected to an silicon oxidation environment to produce the substantially uniform silicon dioxide layer on the sidewalls of the trench.

摘要翻译： 一种用于在独立于轴的硅体上形成基本上均匀的厚的，热生长的二氧化硅材料的方法。 沟槽形成在硅体的表面中，这种沟槽具有设置在不同结晶平面内的侧壁，其中一个这样的平面是<100>结晶平面，另外一个这样的平面是<110>平面。 在侧壁上形成基本均匀的氮化硅层。 具有基本上均匀的氮化硅层的沟槽经受硅氧化环境，其中<110>面中的侧壁以比在100平面中的侧壁更高的速率被氧化，在氮化硅层上产生二氧化硅， 厚度大于<100>平面上的厚度。 对二氧化硅进行蚀刻以选择性地去除二氧化硅，同时留下基本未蚀刻的氮化硅，从而在<100>平面上除去二氧化硅的一部分，从而暴露氮化硅材料的下面部分，同时留下部分 在氮化硅材料的下面部分上的<110>面上的二氧化硅。 选择性地去除氮化硅材料的暴露部分以暴露设置在<100>平面中的沟槽的侧壁的下面部分，同时留下设置在设置在<110>平面中的沟槽的侧壁上的氮化硅材料的基本上未蚀刻的部分 >飞机。 然后将该结构进行硅氧化环境以在沟槽的侧壁上产生基本均匀的二氧化硅层。

公开(公告)号：US06486024B1

公开(公告)日：2002-11-26

申请号：US09577102

申请日：2000-05-24

申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Ulrike Gruening

发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Ulrike Gruening

IPC分类号： H01L218242

CPC分类号： H01L27/10861

摘要： A method of using at least two insulative layers to form the isolation collar of a trench device, and the device formed therefrom. The first layer is preferably an oxide (e.g., silicon dioxide 116) formed on the trench substrate sidewalls, and is formed through a TEOS, LOCOS, or combined TEOS/LOCOS process. Preferably, both the TEOS process and the LOCOS process are used to form the first layer. The second layer is preferably a silicon nitride layer (114) formed on the oxide layer. The multiple layers function as an isolation collar stack for the trench. The dopant penetration barrier properties of the second layer permit the dielectric collar stack to be used as a self aligned mask for subsequent buried plate (120) doping.

摘要翻译： 一种使用至少两个绝缘层以形成沟槽器件的隔离套环的方法，以及由其形成的器件。 第一层优选是形成在沟槽衬底侧壁上的氧化物（例如，二氧化硅116），并且通过TEOS，LOCOS或组合的TEOS / LOCOS工艺形成。 优选地，TEOS工艺和LOCOS工艺都用于形成第一层。 第二层优选是形成在氧化物层上的氮化硅层（114）。 多层用作沟槽的隔离环叠层。 第二层的掺杂剂渗透阻挡性质允许电介质套管叠层用作后续掩埋板（120）掺杂的自对准掩模。

公开(公告)号：US20060172486A1

公开(公告)日：2006-08-03

申请号：US11047312

申请日：2005-01-31

申请人： Helmut Tews ,  Stephan Kudelka ,  Kenneth Settlemyer

发明人： Helmut Tews ,  Stephan Kudelka ,  Kenneth Settlemyer

IPC分类号： H01L21/8242 ,  H01L29/94

CPC分类号： H01L21/30604 ,  H01L29/66181

摘要： The surface area of the walls of a trench formed in a substrate is increased. A barrier layer is formed on the walls of the trench such that the barrier layer is thinner near the corners of the trench and is thicker between the corners of the trench. A dopant is introduced into the substrate through the barrier layer to form higher doped regions in the substrate near the corners of the trench and lesser doped regions between the corners of the trench. The barrier layer is removed, and the walls of the trench are etched in a manner that etches the lesser doped regions of the substrate at a higher rate than the higher doped regions of the substrate to widen and lengthen the trench and to form rounded corners at the intersections of the walls of the trench.

摘要翻译： 在衬底中形成的沟槽的壁的表面积增加。 阻挡层形成在沟槽的壁上，使得阻挡层在沟槽的角部附近更薄，并且在沟槽的角部之间更厚。 通过势垒层将掺杂剂引入到衬底中，以在衬底附近的沟槽的角部附近形成更高的掺杂区域，并且在沟槽的角部之间形成较小的掺杂区域。 去除阻挡层，并且以如下方式蚀刻沟槽的壁，该方式是以比衬底的较高掺杂区域更高的速率蚀刻衬底的较小掺杂区域，以加宽和延长沟槽并且形成圆角 沟渠墙壁的交叉点。