Ring interface and ring network bus flow control system
    1.
    发明授权
    Ring interface and ring network bus flow control system 有权
    环形接口和环网总线流量控制系统

    公开(公告)号:US06496516B1

    公开(公告)日:2002-12-17

    申请号:US09206697

    申请日:1998-12-07

    Abstract: A ring interface is coupled to a current node in a ring network having a plurality of nodes and corresponding ring interface for each of said nodes. The ring interface includes a ring input port operative to conduct upstream message packets from a previous node to the ring interface, a ring output port operative to conduct message packets to a next node of the ring network, and a bypass queue operative to buffer message packets. A receive queue buffers message packets before passing them on to the current node. An address filter is coupled to the ring input port to receive the upstream message packets, read their destination addresses and pass them to the bypass queue if the addresses correspond to another node and pass them to the receive queue if their addresses are that of the current node. A transmit queue buffers message packets from the current node and a bypass-transmit queue arbiter is coupled to outputs of the bypass queue and the transmit queue and is operative to select message packets from one of the bypass queue and the transmit queue in accordance with predetermined selection criterion and transmits the selected message packets to the ring output port.

    Abstract translation: 环形接口耦合到具有多个节点的环形网络中的当前节点和用于每个所述节点的相应环形接口。 所述环形接口包括环形输入端口,用于将上一个节点的上行消息包传送到所述环形接口;环形输出端口,用于对所述环形网络的下一个节点进行消息分组;以及旁路队列,用于缓冲消息分组 。 接收队列将消息包传递到当前节点之前进行缓冲。 地址过滤器被耦合到环形输入端口以接收上行消息分组,读取其目的地地址并将它们传递到旁路队列,如果地址对应于另一个节点,并将它们传递到接收队列,如果它们的地址是当前的 节点。 发送队列缓冲来自当前节点的消息分组,并且旁路发送队列仲裁器耦合到旁路队列和发送队列的输出,并且可操作以根据预定的选择从旁路队列和发送队列中的一个选择消息分组 选择标准,并将所选择的消息分组发送到环形输出端口。

    Maximal length packets
    2.
    发明申请

    公开(公告)号:US20060168384A1

    公开(公告)日:2006-07-27

    申请号:US10977230

    申请日:2004-10-29

    CPC classification number: G06F13/385

    Abstract: Detecting and flushing maximal length packets is set forth herein. In one embodiment, the method comprises receiving a flushing event and, in response to the flushing event, repeatedly detecting a maximum length packet of write data from a write combining storage area and flushing the detected maximum length packet to a target input/output (I/O) device over a bus. Each maximal length packet is a packet of maximum payload of write data that can be formulated within in the write combining storage area while adhering to packet protocol rules for the bus.

    Method, apparatus and system to generate an interrupt by monitoring an external interface
    4.
    发明授权
    Method, apparatus and system to generate an interrupt by monitoring an external interface 有权
    通过监视外部接口产生中断的方法,装置和系统

    公开(公告)号:US07386640B2

    公开(公告)日:2008-06-10

    申请号:US11025381

    申请日:2004-12-28

    CPC classification number: G06F13/22 G06F13/24

    Abstract: In some embodiments, a method, apparatus and system to generate an interrupt by monitoring an external interface are presented. In this regard, an interrupt agent is introduced to communicate over a serial interface with an input/output (I/O) extender and to save a relevant status of the I/O extender in a memory. Other embodiments are also disclosed and claimed.

    Abstract translation: 在一些实施例中,呈现通过监视外部接口来产生中断的方法,装置和系统。 在这方面,引入一个中断代理程序通过串行接口与输入/输出(I / O)扩展器进行通信,并将I / O扩展器的相关状态保存在存储器中。 还公开并要求保护其他实施例。

    Dynamic squelch detection power control
    7.
    发明授权
    Dynamic squelch detection power control 失效
    动态静噪检测功率控制

    公开(公告)号:US08352764B2

    公开(公告)日:2013-01-08

    申请号:US12286188

    申请日:2008-09-29

    CPC classification number: G06F1/3287 G06F1/3209 Y02D10/171 Y02D50/20

    Abstract: In one embodiment, the present invention includes power control logic for squelch detection circuitry to enable selective enabling of one or more squelch detection circuits of an interconnect interface in a low power mode. The logic may include a squelch mode control register to select a first mode or a second mode of power control, a second register coupled to the squelch mode control register to receive software settings to indicate which squelch detect circuit(s) to disable in a low power state of the interconnect, and a detector to dynamically detect a logical lane zero of the interconnect in the second mode. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中,本发明包括用于静噪检测电路的功率控制逻辑,以使得能够以低功率模式选择性地启用互连接口的一个或多个静噪检测电路。 逻辑可以包括静噪模式控制寄存器以选择第一模式或第二模式的功率控制;第二寄存器,耦合到静噪模式控制寄存器以接收软件设置,以指示哪个静噪检测电路在低电平中禁用 互连的功率状态,以及用于在第二模式中动态地检测互连的逻辑通道零点的检测器。 描述和要求保护其他实施例。

    STREAM PRIORITY
    9.
    发明申请
    STREAM PRIORITY 有权
    流行优先

    公开(公告)号:US20120042106A1

    公开(公告)日:2012-02-16

    申请号:US13282462

    申请日:2011-10-27

    CPC classification number: G06F13/4291

    Abstract: A system, method and apparatus for prioritizing transactions is disclosed. I/O devices may generate transactions with a stream identifier. A transaction classifier may assign a priority to a transaction based upon a stream identifier of the transaction. An arbiter may select a transaction for processing based upon priorities assigned to the transaction.

    Abstract translation: 公开了一种用于优先处理事务的系统,方法和装置。 I / O设备可以生成具有流标识符的事务。 事务分类器可以基于事务的流标识符为事务分配优先级。 仲裁者可以基于分配给交易的优先级来选择一个交易进行处理。

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