公开(公告)号：US07183175B2

公开(公告)日：2007-02-27

申请号：US11172707

申请日：2005-07-01

申请人： Steven John Koester ,  Klaus Dietrich Beyer ,  Michael John Hargrove ,  Kern Rim ,  Kevin Kok Chan

发明人： Steven John Koester ,  Klaus Dietrich Beyer ,  Michael John Hargrove ,  Kern Rim ,  Kevin Kok Chan

IPC分类号： H01L21/762

CPC分类号： H01L29/7842 ,  H01L21/76224 ,  H01L29/78687

摘要： A structure, and a method for fabricating the structure, for the isolation of electronic devices is disclosed. The electronic devices are processed in substrates comprising a SiGe based layer underneath a strained Si layer. The isolation structure comprises a trench extending downward from the substrate top surface and penetrating into the SiGe based layer, forming a sidewall in the substrate. An epitaxial Si liner is selectively deposited onto the trench sidewall, and subsequently thermally oxidized. The trench is filled with a trench dielectric, which protrudes above the substrate top surface.

摘要翻译： 公开了用于隔离电子设备的结构和用于制造该结构的方法。 电子器件在包括在应变Si层下面的基于SiGe的层的衬底中被处理。 隔离结构包括从衬底顶表面向下延伸并且穿透到基于SiGe的层中的沟槽，在衬底中形成侧壁。 外延Si衬垫选择性地沉积在沟槽侧壁上，随后被热氧化。 沟槽填充有沟槽电介质，其在衬底顶表面上方突出。

公开(公告)号：US07943412B2

公开(公告)日：2011-05-17

申请号：US10316254

申请日：2002-12-10

申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

IPC分类号： H01L21/00

CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

摘要： A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material. The method of removal of the sacrificial material is by an oxygen plasma or an anneal in an oxygen containing ambient. A method of vacuum encapsulation of the MEMS resonator or filter is provided through means of a cavity containing the MEMS device, filled with additional sacrificial material, and sealed. Access vias are created through the membrane sealing the cavity; the sacrificial material is removed as stated previously, and the vias are re-sealed in a vacuum coating process.

摘要翻译： 一种形成微机电系统（MEMS）谐振器或滤波器的方法，其与在任何模拟，数字或混合信号集成电路（IC）工艺中的集成兼容，或者与这些工艺中的金属互连层的形成同时 ，由于其组成材料，加工步骤和制造温度。 MEMS谐振器或滤波器包含形成MEMS谐振器或滤波器的电极的较低金属电平，其可与IC上的现有金属互连电平中的任何一个或任何一个共享。 它还包括谐振元件，该谐振元件由用于电连接和静电驱动的至少一个金属层和至少一个用于结构目的的电介质层组成。 通过沉积并随后去除由碳基材料构成的牺牲层来产生电极和谐振构件之间的间隙。 去除牺牲材料的方法是通过氧等离子体或在含氧环境中的退火。 MEMS谐振器或滤波器的真空封装方法是通过一个包含MEMS器件的空腔的装置提供的，其中填充有额外的牺牲材料并被密封。 通过隔膜密封腔形成通孔; 如先前所述去除牺牲材料，并且在真空涂覆工艺中重新密封通孔。

公开(公告)号：US20080248635A1

公开(公告)日：2008-10-09

申请号：US12118776

申请日：2008-05-12

申请人： Kevin Kok Chan ,  Rober J. Miller ,  Erin C. Jones ,  Atul Ajmera

发明人： Kevin Kok Chan ,  Rober J. Miller ,  Erin C. Jones ,  Atul Ajmera

IPC分类号： H01L21/225

CPC分类号： H01L29/0843 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/2252 ,  H01L21/31695 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78

摘要： A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating depositions of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and subsequently the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.

摘要翻译： 公开了一种具有多晶SiGe结的MOSFET器件的制造结构和方法。 Ge选择性地生长在Si上，而Si选择性地生长在Ge上。 Ge和Si层的交替沉积产生SiGe结。 沉积的层被掺杂，随后掺杂物扩散到器件本体中。 多晶Ge层和Si层之间的薄多孔氧化层增强了SiGe结的各向同性。

公开(公告)号：US07169674B2

公开(公告)日：2007-01-30

申请号：US11066762

申请日：2005-02-28

申请人： Nestor Alexander Bojarczuk, Jr. ,  Kevin Kok Chan ,  Christopher Peter D'Emic ,  Evgeni Gousev ,  Supratik Guha ,  Paul C. Jamison ,  Lars-Ake Ragnarsson

发明人： Nestor Alexander Bojarczuk, Jr. ,  Kevin Kok Chan ,  Christopher Peter D'Emic ,  Evgeni Gousev ,  Supratik Guha ,  Paul C. Jamison ,  Lars-Ake Ragnarsson

IPC分类号： H01L21/8236 ,  H01L21/8222 ,  H01L21/335 ,  H01L21/8234 ,  H01L21/336 ,  H01L21/331

CPC分类号： H01L29/513 ,  H01L21/28194

摘要： A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electrode. The insulating material can be provided either as a layer or distributed within a gate dielectric material disposed under the gate electrode.

摘要翻译： 用于具有沟道区和栅电极的场效应晶体管的扩散势垒（和形成扩散势垒的方法）包括设置在沟道区上的绝缘材料。 绝缘材料包括氮（N），并且设置在栅电极下方。 绝缘材料可以设置为层或分布在设置在栅电极下方的栅极电介质材料内。

公开(公告)号：US06716708B2

公开(公告)日：2004-04-06

申请号：US10299688

申请日：2002-11-20

申请人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Kathryn Wilder Guarini ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

发明人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Kathryn Wilder Guarini ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

IPC分类号： H01L21336

CPC分类号： H01L29/665 ,  H01L21/26506 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/28525 ,  H01L29/41783

摘要： A method (and resultant structure) for forming a metal silicide contact on a silicon-containing region having controlled consumption of said silicon-containing region, includes implanting Ge into the silicon-containing region, forming a blanket metal-silicon mixture layer over the silicon-containing region, reacting the metal-silicon mixture with silicon at a first temperature to form a metal silicon alloy, etching unreacted portions of the metal-silicon mixture layer, forming a blanket silicon layer over the metal silicon alloy layer, annealing at a second temperature to form an alloy of metal-Si2, and selectively etching the unreacted silicon layer.

摘要翻译： 一种用于在具有所述含硅区域的受控消耗的含硅区域上形成金属硅化物接触的方法（和所得结构）包括将Ge注入含硅区域中，在硅上形成覆盖的金属 - 硅混合物层 在第一温度下使金属硅混合物与硅反应以形成金属硅合金，蚀刻金属 - 硅混合物层的未反应部分，在金属硅合金层上形成覆盖硅层，在第二温度下退火 温度以形成金属-Si2的合金，并且选择性地蚀刻未反应的硅层。

公开(公告)号：US20090108381A1

公开(公告)日：2009-04-30

申请号：US10316254

申请日：2002-12-10

申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

IPC分类号： H03H9/24 ,  H01L23/28 ,  H01L21/56

CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

摘要： A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material. The method of removal of the sacrificial material is by an oxygen plasma or an anneal in an oxygen containing ambient. A method of vacuum encapsulation of the MEMS resonator or filter is provided through means of a cavity containing the MEMS device, filled with additional sacrificial material, and sealed. Access vias are created through the membrane sealing the cavity; the sacrificial material is removed as stated previously, and the vias are re-sealed in a vacuum coating process.

摘要翻译： 一种形成微机电系统（MEMS）谐振器或滤波器的方法，其与在任何模拟，数字或混合信号集成电路（IC）工艺中的集成兼容，或者与这些工艺中的金属互连层的形成同时 ，由于其组成材料，加工步骤和制造温度。 MEMS谐振器或滤波器包含形成MEMS谐振器或滤波器的电极的较低金属电平，其可与IC上的现有金属互连电平中的任何一个或任何一个共享。 它还包括谐振元件，该谐振元件由用于电连接和静电驱动的至少一个金属层和至少一个用于结构目的的电介质层组成。 通过沉积并随后去除由碳基材料构成的牺牲层来产生电极和谐振构件之间的间隙。 去除牺牲材料的方法是通过氧等离子体或在含氧环境中的退火。 MEMS谐振器或滤波器的真空封装方法是通过一个包含MEMS器件的空腔的装置提供的，其中填充有额外的牺牲材料并被密封。 通过隔膜密封腔形成通孔; 如先前所述去除牺牲材料，并且在真空涂覆工艺中重新密封通孔。

公开(公告)号：US07135391B2

公开(公告)日：2006-11-14

申请号：US10851821

申请日：2004-05-21

申请人： Kevin Kok Chan ,  Rober J. Miller ,  Erin C. Jones ,  Atul Ajmera

发明人： Kevin Kok Chan ,  Rober J. Miller ,  Erin C. Jones ,  Atul Ajmera

IPC分类号： H01L21/20 ,  C23C16/24

CPC分类号： H01L29/0843 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/2252 ,  H01L21/31695 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78

摘要： A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating depositions of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and subsequently the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.

摘要翻译： 公开了一种具有多晶SiGe结的MOSFET器件的制造结构和方法。 Ge选择性地生长在Si上，而Si选择性地生长在Ge上。 Ge和Si层的交替沉积产生SiGe结。 沉积的层被掺杂，随后掺杂物扩散到器件本体中。 多晶Ge层和Si层之间的薄多孔氧化层增强了SiGe结的各向同性。

公开(公告)号：US20110109405A1

公开(公告)日：2011-05-12

申请号：US13007130

申请日：2011-01-14

申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

IPC分类号： H03H9/24

CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

摘要： A microelectromechanical system (MEMS) resonator or filter including a first conductive layer, one or more electrodes patterned in the first conductive layer which serve the function of signal input, signal output, or DC biasing, or some combination of these functions, an evacuated cavity, a resonating member comprised of a lower conductive layer and an upper structural layer, a first air gap between the resonating member and one or more of the electrodes, an upper membrane covering the cavity, and a second air gap between the resonating member and the upper membrane.

摘要翻译： 一种微机电系统（MEMS）谐振器或滤波器，其包括第一导电层，在第一导电层中图案化的一个或多个电极，其用于信号输入，信号输出或DC偏置的功能，或这些功能的某些组合;抽真空腔 ，由下导电层和上结构层构成的谐振构件，在谐振构件和一个或多个电极之间的第一气隙，覆盖空腔的上膜，以及谐振构件和第二气隙之间的第二气隙 上膜。

公开(公告)号：US06987050B2

公开(公告)日：2006-01-17

申请号：US09902483

申请日：2001-07-11

申请人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

发明人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

IPC分类号： H01L21/331 ,  H01L21/336 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L29/66772 ,  H01L21/28518 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/665 ,  H01L29/78

摘要： A method (and resulting structure) for fabricating a silicide for a semiconductor device, includes depositing a metal or an alloy thereof on a silicon substrate, reacting the metal or the alloy to form a first silicide phase, etching any unreacted metal, depositing a silicon cap layer over the first silicide phase, reacting the silicon cap layer to form a second silicide phase, for the semiconductor device, and etching any unreacted silicon. The substrate can be either a silicon-on-insulator (SOI) substrate or a bulk silicon substrate.

摘要翻译： 一种用于制造半导体器件用硅化物的方法（及其结构）包括在硅衬底上沉积金属或其合金，使金属或合金反应形成第一硅化物相，蚀刻任何未反应的金属，沉积硅 在第一硅化物相上，使硅帽层反应形成第二硅化物相，并且蚀刻任何未反应的硅。 衬底可以是绝缘体上硅（SOI）衬底或体硅衬底。

公开(公告)号：US06555880B2

公开(公告)日：2003-04-29

申请号：US09875187

申请日：2001-06-07

申请人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Kathryn Wilder Guarini ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

发明人： Cyril Cabral, Jr. ,  Kevin Kok Chan ,  Guy Moshe Cohen ,  Kathryn Wilder Guarini ,  Christian Lavoie ,  Ronnen Andrew Roy ,  Paul Michael Solomon

IPC分类号： H01L31119

CPC分类号： H01L29/665 ,  H01L21/26506 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/28525 ,  H01L29/41783

摘要： A semiconductor structure includes raised source and drain regions, where the raised source and drain regions are facet free and unconstrained to have a shape conforming to a same crystallographic axes with respect to each other.

摘要翻译： 半导体结构包括凸起的源极和漏极区域，其中升高的源极和漏极区域是小面自由的并且不受限制地具有与彼此相同的结晶轴的形状。