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    Through substrate vias
    4.
    发明授权
    Through substrate vias 有权
    通过衬底通孔

    公开(公告)号：US08263492B2

    公开(公告)日：2012-09-11

    申请号：US12432243

    申请日：2009-04-29

    申请人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

    发明人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

    IPC分类号： H01L21/768 ,  H01L23/48

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.

    摘要翻译： 提出了用于形成通孔的方法和装置，例如，在包括衬底的半导体晶片的一部分中形成通孔的方法。 该方法包括形成围绕基板的第一部分的沟槽，使得第一部分与基板的第二部分分离，在第一部分内形成穿过基板的孔，并在孔内形成第一金属。 沟槽延伸穿过衬底。 第一金属从基板的前表面延伸到基板的后表面。 通孔包括孔和第一金属。

    Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters
    6.
    发明授权
    Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters 失效
    用于MEMS RF谐振器和滤波器的低温Bi-CMOS兼容工艺

    公开(公告)号：US07943412B2

    公开(公告)日：2011-05-17

    申请号：US10316254

    申请日：2002-12-10

    申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

    发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

    IPC分类号： H01L21/00

    CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

    摘要： A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material. The method of removal of the sacrificial material is by an oxygen plasma or an anneal in an oxygen containing ambient. A method of vacuum encapsulation of the MEMS resonator or filter is provided through means of a cavity containing the MEMS device, filled with additional sacrificial material, and sealed. Access vias are created through the membrane sealing the cavity; the sacrificial material is removed as stated previously, and the vias are re-sealed in a vacuum coating process.

    摘要翻译： 一种形成微机电系统（MEMS）谐振器或滤波器的方法，其与在任何模拟，数字或混合信号集成电路（IC）工艺中的集成兼容，或者与这些工艺中的金属互连层的形成同时 ，由于其组成材料，加工步骤和制造温度。 MEMS谐振器或滤波器包含形成MEMS谐振器或滤波器的电极的较低金属电平，其可与IC上的现有金属互连电平中的任何一个或任何一个共享。 它还包括谐振元件，该谐振元件由用于电连接和静电驱动的至少一个金属层和至少一个用于结构目的的电介质层组成。 通过沉积并随后去除由碳基材料构成的牺牲层来产生电极和谐振构件之间的间隙。 去除牺牲材料的方法是通过氧等离子体或在含氧环境中的退火。 MEMS谐振器或滤波器的真空封装方法是通过一个包含MEMS器件的空腔的装置提供的，其中填充有额外的牺牲材料并被密封。 通过隔膜密封腔形成通孔; 如先前所述去除牺牲材料，并且在真空涂覆工艺中重新密封通孔。

    Through Substrate Vias
    7.
    发明申请
    Through Substrate Vias 有权
    通过基板通风

    公开(公告)号：US20100276786A1

    公开(公告)日：2010-11-04

    申请号：US12432243

    申请日：2009-04-29

    申请人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

    发明人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.

    摘要翻译： 提出了用于形成通孔的方法和装置，例如，在包括衬底的半导体晶片的一部分中形成通孔的方法。 该方法包括形成围绕基板的第一部分的沟槽，使得第一部分与基板的第二部分分离，在第一部分内形成穿过基板的孔，并在孔内形成第一金属。 沟槽延伸穿过衬底。 第一金属从基板的前表面延伸到基板的后表面。 通孔包括孔和第一金属。

    Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same
    8.
    发明授权
    Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same 失效
    通过使用其去除保护层和牺牲层的方法来获得释放稳定的微结构和器件

    公开(公告)号：US07192868B2

    公开(公告)日：2007-03-20

    申请号：US11053610

    申请日：2005-02-08

    申请人： John Michael Cotte ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes

    发明人： John Michael Cotte ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： B81C1/00476 ,  B81B2203/0118 ,  B81C2201/0132 ,  G01N1/32 ,  Y10S438/933

    摘要： A method of patterning and releasing chemically sensitive low k films without the complication of a permanent hardmask stack, yielding an unaltered free-standing structure is provided. The method includes providing a structure including a Si-containing substrate having in-laid etch stop layers located therein; forming a chemically sensitive low k film and a protective hardmask having a pattern atop the structure; transferring the pattern to the chemically sensitive low k film to provide an opening that exposes a portion of the Si-containing substrate; and etching the exposed portion of the Si-containing substrate through the opening to provide a cavity in the Si-containing substrate in which a free-standing low k film structure is formed, while removing the hardmask. In accordance with the present invention, the etching comprises a XeF2 etch gas.

    摘要翻译： 提供了图案化和释放化学敏感性低k膜的方法，而不需要永久性硬掩模堆叠的复杂性，产生未改变的独立结构。 该方法包括提供包括其中位于其中的内置蚀刻停止层的含Si衬底的结构; 形成化学敏感的低k膜和在结构顶部具有图案的保护性硬掩模; 将图案转移到化学敏感的低k膜上以提供暴露一部分含Si衬底的开口; 并且通过所述开口蚀刻含Si衬底的暴露部分，以在去除硬掩模的同时在其中形成独立的低k膜结构的含Si衬底中提供空腔。 根据本发明，蚀刻包括XeF 2 N 2蚀刻气体。