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    CMOS transistor junction regions formed by a CVD etching and deposition sequence
    3.
    发明授权
    CMOS transistor junction regions formed by a CVD etching and deposition sequence 有权
    通过CVD蚀刻和沉积顺序形成CMOS晶体管结区域

    公开(公告)号：US07812394B2

    公开(公告)日：2010-10-12

    申请号：US12250191

    申请日：2008-10-13

    申请人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    发明人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    IPC分类号： H01L31/119

    CPC分类号： H01L29/7848 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/517 ,  H01L29/66628 ,  H01L29/7834

    摘要： This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in another. Disclosed is a method to perform the etch and subsequent deposition in the same reactor without atmospheric exposure. In-situ etching of the source-drain recess for replacement source-drain applications provides several advantages over state of the art ex-situ etching. Transistor drive current is improved by: (1) Eliminating contamination of the silicon-epilayer interface when the as-etched surface is exposed to atmosphere and (2) Precise control over the shape of the etch recess. Deposition may be done by a variety of techniques including selective and non-selective methods. In the case of blanket deposition, a measure to avoid amorphous deposition in performance critical regions is also presented.

    摘要翻译： 本发明增加了替代源极 - 漏极cMOS晶体管的技术。 方法可以包括使用一个设备组来蚀刻衬底材料中的凹部，然后在另一个设备组中进行沉积。 公开了一种在没有大气暴露的情况下在相同的反应器中进行蚀刻和随后的沉积的方法。 用于替代源极 - 漏极应用的源极 - 漏极凹槽的原位蚀刻提供了优于现有技术的非原位蚀刻的几个优点。 晶体管驱动电流通过以下因素得到改善：（1）当被蚀刻的表面暴露于大气中时，消除硅 - 外延层界面的污染，（2）精确控制蚀刻凹槽的形状。 沉积可以通过各种技术进行，包括选择性和非选择性方法。 在覆盖层沉积的情况下，还提出了避免在性能关键区域中无定形沉积的措施。

    CMOS TRANSISTOR JUNCTION REGIONS FORMED BY A CVD ETCHING AND DEPOSITION SEQUENCE
    5.
    发明申请
    CMOS TRANSISTOR JUNCTION REGIONS FORMED BY A CVD ETCHING AND DEPOSITION SEQUENCE 有权
    由CVD蚀刻和沉积序列形成的CMOS晶体管结区

    公开(公告)号：US20090039390A1

    公开(公告)日：2009-02-12

    申请号：US12250191

    申请日：2008-10-13

    申请人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    发明人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    IPC分类号： H01L29/778 ,  H01L21/336

    CPC分类号： H01L29/7848 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/517 ,  H01L29/66628 ,  H01L29/7834

    摘要： This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in another. Disclosed is a method to perform the etch and subsequent deposition in the same reactor without atmospheric exposure. In-situ etching of the source-drain recess for replacement source-drain applications provides several advantages over state of the art ex-situ etching. Transistor drive current is improved by: (1) Eliminating contamination of the silicon-epilayer interface when the as-etched surface is exposed to atmosphere and (2) Precise control over the shape of the etch recess. Deposition may be done by a variety of techniques including selective and non-selective methods. In the case of blanket deposition, a measure to avoid amorphous deposition in performance critical regions is also presented.

    摘要翻译： 本发明增加了替代源极 - 漏极cMOS晶体管的技术。 方法可以包括使用一个设备组来蚀刻衬底材料中的凹部，然后在另一个设备组中进行沉积。 公开了一种在没有大气暴露的情况下在相同的反应器中进行蚀刻和随后的沉积的方法。 用于替代源极 - 漏极应用的源极 - 漏极凹槽的原位蚀刻提供了与现有技术的非原位蚀刻相比的几个优点。 晶体管驱动电流通过以下因素得到改善：（1）当被蚀刻的表面暴露于大气中时，消除硅 - 外延层界面的污染，（2）精确控制蚀刻凹槽的形状。 沉积可以通过各种技术进行，包括选择性和非选择性方法。 在覆盖层沉积的情况下，还提出了避免在性能关键区域中无定形沉积的措施。

    CMOS transistor junction regions formed by a CVD etching and deposition sequence
    6.
    发明授权
    CMOS transistor junction regions formed by a CVD etching and deposition sequence 有权
    通过CVD蚀刻和沉积顺序形成CMOS晶体管结区域

    公开(公告)号：US07479432B2

    公开(公告)日：2009-01-20

    申请号：US11643523

    申请日：2006-12-21

    申请人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    发明人： Anand Murthy ,  Glenn A. Glass ,  Andrew N. Westmeyer ,  Michael L. Hattendorf ,  Jeffrey R. Wank

    IPC分类号： H01L27/108

    CPC分类号： H01L29/7848 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/517 ,  H01L29/66628 ,  H01L29/7834

    摘要： This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in another. Disclosed is a method to perform the etch and subsequent deposition in the same reactor without atmospheric exposure. In-situ etching of the source-drain recess for replacement source-drain applications provides several advantages over state of the art ex-situ etching. Transistor drive current is improved by: (1) Eliminating contamination of the silicon-epilayer interface when the as-etched surface is exposed to atmosphere and (2) Precise control over the shape of the etch recess. Deposition may be done by a variety of techniques including selective and non-selective methods. In the case of blanket deposition, a measure to avoid amorphous deposition in performance critical regions is also presented.

    摘要翻译： 本发明增加了替代源极 - 漏极cMOS晶体管的技术。 方法可以包括使用一个设备组来蚀刻衬底材料中的凹部，然后在另一个设备组中进行沉积。 公开了一种在没有大气暴露的情况下在相同的反应器中进行蚀刻和随后的沉积的方法。 用于替代源极 - 漏极应用的源极 - 漏极凹槽的原位蚀刻提供了与现有技术的非原位蚀刻相比的几个优点。 晶体管驱动电流通过以下因素得到改善：（1）当被蚀刻的表面暴露于大气中时，消除硅 - 外延层界面的污染，（2）精确控制蚀刻凹槽的形状。 沉积可以通过各种技术进行，包括选择性和非选择性方法。 在覆盖层沉积的情况下，还提出了避免在性能关键区域中无定形沉积的措施。