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138 条记录 (耗时 0.026 秒)

    Fast bi-directional tristateable line driver
    1.
    发明授权
    Fast bi-directional tristateable line driver 失效
    快速双向三向线驱动

    公开(公告)号：US06175253B1

    公开(公告)日：2001-01-16

    申请号：US09052883

    申请日：1998-03-31

    申请人： Subramaniam Maiyuran ,  Sanjay Dabral ,  Thu M. Do ,  Scott E. Siers ,  Mehrdad Mohebbi

    发明人： Subramaniam Maiyuran ,  Sanjay Dabral ,  Thu M. Do ,  Scott E. Siers ,  Mehrdad Mohebbi

    IPC分类号： H03K1902

    CPC分类号： H03K19/018592 ,  H03K19/09429

    摘要： A driver to drive a bus with a pullup and a pulldown transistor according to a data signal during a drive phase and to charge or discharge the bus to intermediate voltage levels during a precondition phase using the pullup and pulldown transistors, the driver comprising a buffer and latch to latch the bus voltage at the end of a drive phase; a precondition circuit responsive to the latch to switch ON a pullup transistor at the beginning of a precondition phase when the bus voltage was LOW in the previous drive phase so as to charge the bus voltage to a first voltage less than a supply voltage, and to switch ON a pulldown transistor at the beginning of the precondition phase when the bus voltage was HIGH in the previous drive phase so as to discharge the bus voltage to a second voltage above ground.

    摘要翻译： 驱动器，其在驱动阶段期间根据数据信号驱动具有上拉和下拉晶体管的总线，并且在使用所述上拉和下拉晶体管的前提阶段期间将所述总线充电或放电到中间电压电平，所述驱动器包括缓冲器和 在驱动阶段结束时锁存总线电压; 当前一个驱动阶段的总线电压为低电平时，响应锁存器的开关状态，在预处理阶段开始时接通上拉晶体管，以便将总线电压充电到小于电源电压的第一电压， 在前一个驱动阶段的总线电压为高电平时，在预处理阶段开始时，接通一个下拉晶体管，以便将总线电压放电到地面以上的第二个电压。

    Input/output driver swing control and supply noise rejection
    4.
    发明授权
    Input/output driver swing control and supply noise rejection 有权
    输入/输出驱动器摆幅控制和电源噪声抑制

    公开(公告)号：US08143911B2

    公开(公告)日：2012-03-27

    申请号：US12060251

    申请日：2008-03-31

    申请人： Zuoguo Wu ,  Feng Chen ,  Sanjay Dabral

    发明人： Zuoguo Wu ,  Feng Chen ,  Sanjay Dabral

    IPC分类号： H03K17/16 ,  H03K19/003 ,  H03K19/0175

    CPC分类号： H04L25/0276

    摘要： In general, in one aspect, the disclosure describes an apparatus having an averager to receive differential output voltages of a transmitter and generate an average transmitter output voltage. A comparator is to compare the average transmitter output voltage to a reference voltage and generate a difference therebetween. An integrator is to integrate the difference between the average transmitter output voltage and the reference voltage over time. The integrated difference is fed back to the transmitter to bias the transmitter.

    摘要翻译： 通常，在一个方面，本公开描述了一种具有平均器以接收发射机的差分输出电压并产生平均发射机输出电压的装置。 比较器将平均发射机输出电压与参考电压进行比较，并产生它们之间的差值。 积分器将整合平均发射机输出电压和参考电压随时间的差异。 积分差值被反馈给发射机以偏置发射机。

    Circuit board including stubless signal paths and method of making same
    6.
    发明授权
    Circuit board including stubless signal paths and method of making same 有权
    电路板包括无铅信号路径及其制作方法

    公开(公告)号：US07907418B2

    公开(公告)日：2011-03-15

    申请号：US12628778

    申请日：2009-12-01

    申请人： Pascal Meier ,  Sanjay Dabral

    发明人： Pascal Meier ,  Sanjay Dabral

    IPC分类号： H05K7/00

    CPC分类号： H05K3/4611 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/024 ,  H05K1/112 ,  H05K1/147 ,  H05K3/0064 ,  H05K3/4084 ,  H05K2201/091 ,  H05K2201/09318 ,  H05K2201/10734 ,  Y10T29/49126

    摘要： A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

    摘要翻译： 电路板可以包括第一和第二侧，在侧面之间的多个电路板层和位于相应的电路板层中的多个信号迹线。 电路板层和信号迹线可以从电路板的第一侧的第一部件连接区域延伸到电路板的第一侧的第二部件连接区域。 因此，信号迹线可以在组件连接区域之间形成通过电路板的不连续的信号路径。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

    Method of fabricating a linearized output driver and terminator
    10.
    发明授权
    Method of fabricating a linearized output driver and terminator 有权
    制造线性化输出驱动器和终端器的方法

    公开(公告)号：US07250333B2

    公开(公告)日：2007-07-31

    申请号：US10394977

    申请日：2003-03-20

    申请人： Sanjay Dabral ,  Krishna Seshan

    发明人： Sanjay Dabral ,  Krishna Seshan

    IPC分类号： H01L21/8234 ,  H01L21/8244

    CPC分类号： H01L29/66659 ,  H01L29/7835 ,  Y02P80/30

    摘要： A method and apparatus for a linearized output driver and terminator is described. In one embodiment the method includes forming a gate electrode on a substrate, the portion of the substrate covered by the gate electrode defining a channel. The method further includes forming a first source/drain doped region on laterally opposed sides of the gate electrode in the substrate. The method also includes forming a spacer on laterally opposed sides of the gate electrode on the substrate. The method also includes forming a linearized drain contact region at a location within the first source/drain doped region sufficiently distant from the gate electrode to define a series resistor in the first source/drain doped region disposed between the gate electrode and the linearized drain contact area based on an expected resistivity of the source/drain doped region, the series resistor coupled electrically to the channel.

    摘要翻译： 描述了用于线性化输出驱动器和终止器的方法和装置。 在一个实施例中，该方法包括在衬底上形成栅电极，衬底的由栅电极覆盖的部分限定沟道。 该方法还包括在衬底的栅电极的横向相对侧上形成第一源极/漏极掺杂区域。 该方法还包括在基板上的栅电极的横向相对侧上形成间隔物。 该方法还包括在与栅电极充分远的第一源极/漏极掺杂区域内的位置处形成线性化的漏极接触区域，以在布置在栅极电极和线性化漏极接触之间的第一源极/漏极掺杂区域中限定串联电阻器 基于源极/漏极掺杂区域的预期电阻率的区域，串联电阻器电连接到沟道。