公开(公告)号：US08400860B2

公开(公告)日：2013-03-19

申请号：US12839542

申请日：2010-07-20

申请人： Sung-Chieh Lin ,  David Yen ,  Wei-Li Liao ,  Jiann-Tseng Huang ,  Kuoyuan (Peter) Hsu

发明人： Sung-Chieh Lin ,  David Yen ,  Wei-Li Liao ,  Jiann-Tseng Huang ,  Kuoyuan (Peter) Hsu

IPC分类号： G11C17/16

CPC分类号： G11C17/16

摘要： Some embodiments regard a memory array that has a plurality of rows and columns. A column includes a program control device, a plurality of eFuse memory cells in the column, a sense amplifier, and a bit line coupling the program control device, the plurality of memory cells in the column, and the sense amplifier. A row includes a plurality of eFuse memory cells in the row, a word line coupling the plurality of eFuse memory cells in the row, and a footer configured as a current path for the plurality of eFuse memory cells in the row.

摘要翻译： 一些实施例涉及具有多个行和列的存储器阵列。 列包括程序控制装置，列中的多个eFuse存储器单元，读出放大器和耦合程序控制装置，列中的多个存储单元和读出放大器的位线。 行包括行中的多个eFuse存储器单元，耦合行中的多个eFuse存储器单元的字线和被配置为行中的多个eFuse存储器单元的当前路径的页脚。

公开(公告)号：US08824234B2

公开(公告)日：2014-09-02

申请号：US13771674

申请日：2013-02-20

申请人： Sung-Chieh Lin ,  David Yen ,  Wei-Li Liao ,  Jiann-Tseng Huang ,  Kuoyuan (Peter) Hsu

发明人： Sung-Chieh Lin ,  David Yen ,  Wei-Li Liao ,  Jiann-Tseng Huang ,  Kuoyuan (Peter) Hsu

IPC分类号： G11C17/16

CPC分类号： G11C17/16

摘要： A method of reading an eFuse in a column of eFuse memory cells includes electrically disconnecting a first end of the eFuse from a first electrical path. A second electrical path between a second end of the eFuse and a node is activated to bypass a third electrical path, where the third electrical path includes a diode device between the second end of the eFuse and the node. A footer coupled with the node is turned on.

摘要翻译： 读取eFuse存储单元列中的eFuse的方法包括将eFuse的第一端与第一电路断开。 eFuse的第二端和节点之间的第二电路被激活以绕过第三电路，其中第三电路包括在eFuse的第二端和节点之间的二极管器件。 与节点耦合的页脚被打开。

公开(公告)号：US08946825B2

公开(公告)日：2015-02-03

申请号：US13433194

申请日：2012-03-28

申请人： David Yen ,  Sung-Chieh Lin ,  Kuoyuan (Peter) Hsu

发明人： David Yen ,  Sung-Chieh Lin ,  Kuoyuan (Peter) Hsu

IPC分类号： H01L23/62

CPC分类号： H01L27/0928 ,  H01L21/263 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L29/6609

摘要： During various processing operations, ions from process plasma may be transfer to a deep n-well (DNW) formed under devices structures. A reverse-biased diode may be connected to the signal line to protect a gate dielectric formed outside the DNW and is connected to the drain of the transistor formed inside the DNW.

摘要翻译： 在各种处理操作期间，来自工艺等离子体的离子可以转移到在器件结构下形成的深n阱（DNW）。 反向偏置二极管可以连接到信号线以保护形成在DNW外部的栅极电介质，并且连接到形成在DNW内部的晶体管的漏极。

公开(公告)号：US08625324B2

公开(公告)日：2014-01-07

申请号：US13107441

申请日：2011-05-13

申请人： Sung-Chieh Lin ,  David Yen ,  Chi-Hsu Chiu ,  Kuoyuan (Peter) Hsu

发明人： Sung-Chieh Lin ,  David Yen ,  Chi-Hsu Chiu ,  Kuoyuan (Peter) Hsu

IPC分类号： G11C17/00 ,  H01L23/52

CPC分类号： H01L23/5256 ,  G11C17/10 ,  G11C17/16 ,  H01L2924/0002 ,  H01L2924/00

摘要： The embodiments of methods and structures disclosed herein provide mechanisms of forming and programming a non-salicided polysilicon fuse. The non-salicided polysilicon fuse and a programming transistor form a one-time programmable (OTP) memory cell, which can be programmed with a low programming voltage.

摘要翻译： 本文公开的方法和结构的实施例提供了形成和编程非水化多晶硅熔丝的机制。 非水银多晶硅熔丝和编程晶体管形成一个可编程的编程电压低的一次可编程（OTP）存储单元。

公开(公告)号：US08466732B2

公开(公告)日：2013-06-18

申请号：US12900650

申请日：2010-10-08

申请人： Po-Hung Chen ,  Kuoyuan (Peter) Hsu ,  David Yen ,  Sung-Chieh Lin

发明人： Po-Hung Chen ,  Kuoyuan (Peter) Hsu ,  David Yen ,  Sung-Chieh Lin

IPC分类号： H03L5/00

CPC分类号： H03K3/356165

摘要： An input of a first inverter is configured to serve as an input node. An output of the first inverter is coupled to an input of a second inverter. An output of the second inverter is configured to serve as an output node. An input of a third inverter is coupled to an input of the first inverter. A gate of a first NMOS transistor is coupled to an output of the third inverter. A drain of the first NMOS transistor is coupled to the second inverter. A source of the first NMOS transistor is configured to serve as a level input node. When the input node is configured to receive a low logic level, the output node is configured to receive a voltage level provided by a voltage level at the level input node.

摘要翻译： 第一反相器的输入被配置为用作输入节点。 第一反相器的输出耦合到第二反相器的输入端。 第二反相器的输出被配置为用作输出节点。 第三反相器的输入耦合到第一反相器的输入端。 第一NMOS晶体管的栅极耦合到第三反相器的输出端。 第一NMOS晶体管的漏极耦合到第二反相器。 第一NMOS晶体管的源极被配置为用作电平输入节点。 当输入节点被配置为接收低逻辑电平时，输出节点被配置为接收由电平输入节点处的电压电平提供的电压电平。

公开(公告)号：US06158469A

公开(公告)日：2000-12-12

申请号：US404632

申请日：1999-09-23

申请人： David Yen

发明人： David Yen

IPC分类号： E03C1/04 ,  E03C1/02

CPC分类号： E03C1/0404 ,  Y10T137/9464

摘要： A spout assembly includes an inner tube adapted to be in fluid communication and in watertight connection with a faucet body, and an outer tube telescopically fitted on the inner tube. An outer circumferential wall of the inner tube has a plurality of annular retaining grooves disposed therein and spaced apart from and aligned with one another for receiving annular elastomeric members. Each elastomeric member extends beyond the outer circumferential wall to form an annular bump portion. The outer tube is slidably fitted on the outer circumferential wall, and has an inner peripheral wall with an annular friction member to surround and in slidable contact with the outer circumferential wall. Thus, when the friction member is brought into engagement with one of the annular bump portions by sliding movement of the inner peripheral wall, the engaged annular bump portion will be deformed radially to increase the friction force therebetween so as to arrest the inner peripheral wall from moving relative to the outer circumferential wall.

摘要翻译： 喷嘴组件包括适于与水龙头本体流体连通并与水密连接的内管和可伸缩地装配在内管上的外管。 内管的外周壁具有多个设置在其中的环形保持槽，并且彼此间隔开并且彼此对准以接收环形弹性体构件。 每个弹性体构件延伸超过外周壁以形成环形凸起部分。 外管可滑动地安装在外周壁上，并且具有环形摩擦构件的内周壁，以围绕外壁和与外周壁滑动接触。 因此，当通过内周壁的滑动使摩擦构件与其中一个环形凸起部分接合时，接合的环形凸起部分将径向变形，以增加它们之间的摩擦力，从而阻止内周壁 相对于外周壁移动。

公开(公告)号：US20100165704A1

公开(公告)日：2010-07-01

申请号：US12346173

申请日：2008-12-30

申请人： Cheng-Hsu Wu ,  David Yen ,  Tsai-Hsin Lai

发明人： Cheng-Hsu Wu ,  David Yen ,  Tsai-Hsin Lai

IPC分类号： G11C11/24 ,  G11C11/416

CPC分类号： G11C11/416 ,  G11C11/405

摘要： A memory cell is disclosed, including a write access transistor coupled between a storage node and a write bit line, and active during a write cycle responsive to a voltage on a write word line; a read access transistor coupled between a read word line and a read bit line, and active during a read cycle responsive to a voltage at the storage node; and a storage capacitor coupled between the read word line and the storage node. Methods for operating the memory cell are also disclosed.

摘要翻译： 公开了一种存储器单元，包括耦合在存储节点和写位线之间的写入存取晶体管，并且在写入周期期间响应于写入字线上的电压而有效; 读取存取晶体管，耦合在读取字线和读取位线之间，并且响应于存储节点处的电压在读取周期期间有效; 以及耦合在读取字线和存储节点之间的存储电容器。 还公开了用于操作存储器单元的方法。

公开(公告)号：US06772028B1

公开(公告)日：2004-08-03

申请号：US10397476

申请日：2003-03-26

申请人： Kevin Yen ,  Ching-Yun Chang ,  David Yen ,  Eric Hu

发明人： Kevin Yen ,  Ching-Yun Chang ,  David Yen ,  Eric Hu

IPC分类号： G06F1900

CPC分类号： G06Q10/0875 ,  G05B19/4183 ,  G05B2219/31322 ,  G05B2219/45031 ,  G06Q20/203 ,  Y02P90/10 ,  Y02P90/14 ,  Y02P90/20

摘要： A method for performing a synchronized order change in a manufacturing process is provided. An order is associated with an order number and a work in process (WIP) number, which identifies a physical lot corresponding to the order. The synchronized order change maintains a relationship between the order number and the WIP number while making the change. This avoids the need to scrap lots that are no longer associated with an order number and prevents holds from being placed on incorrect lots.

摘要翻译： 提供了一种用于在制造过程中执行同步顺序改变的方法。 订单与订单号码和正在处理的工作（WIP）号码相关联，其中标识与订单相对应的物理批号。 同步订单变更在进行更改时保持订单编号和WIP号码之间的关系。 这样可以避免对不再与订单号相关联的批次进行废品处理，并且防止保留被放置在不正确的批次上。

公开(公告)号：US08736015B2

公开(公告)日：2014-05-27

申请号：US13246495

申请日：2011-09-27

申请人： Yao-Jen Tsai ,  Chih-Fu Chang ,  Chih-Kang Chuang ,  Yee-Ren Wuang ,  David Yen ,  Yuan-Jen Liao ,  Shih-Che Fang ,  Hung-Che Hsueh ,  Chih Mou Huang

发明人： Yao-Jen Tsai ,  Chih-Fu Chang ,  Chih-Kang Chuang ,  Yee-Ren Wuang ,  David Yen ,  Yuan-Jen Liao ,  Shih-Che Fang ,  Hung-Che Hsueh ,  Chih Mou Huang

IPC分类号： H01L29/06

CPC分类号： H01L27/0251

摘要： An embodiment is an integrated circuit (IC) structure. The structure comprises a deep n well in a substrate, a first pickup device in the deep n well, a first signal device in the deep n well, a dissipation device in the substrate, a second signal device in the substrate, a first electrical path between the first pickup device and the dissipation device, and a second electrical path between the first signal device and the second signal device. The dissipation device is outside of the deep n well, and the second signal device is outside of the deep n well. A highest point of the first electrical path is lower than a highest point of the second electrical path.

摘要翻译： 一个实施例是集成电路（IC）结构。 该结构包括衬底中的深n阱，深n阱中的第一拾取装置，深n阱中的第一信号装置，衬底中的耗散装置，衬底中的第二信号装置，第一电路 在第一拾取装置和耗散装置之间，以及在第一信号装置和第二信号装置之间的第二电路径。 耗散装置在深n井外，第二信号装置在深n井外。 第一电路的最高点低于第二电路的最高点。

公开(公告)号：US20080135093A1

公开(公告)日：2008-06-12

申请号：US11761570

申请日：2007-06-12

申请人： David Yen

发明人： David Yen

IPC分类号： H01L31/04

CPC分类号： H01L31/0547 ,  Y02E10/52

摘要： The optoelectronic apparatus of the present invention includes a solar cell and a prism located over the solar cell. The light reflected by the solar cell is reflected back to the solar cell by the prism. Therefore, the light repeatedly illuminates the solar cell to improve the power transference rate.

摘要翻译： 本发明的光电子装置包括位于太阳能电池上方的太阳能电池和棱镜。 由太阳能电池反射的光被棱镜反射回太阳能电池。 因此，光反射地照射太阳能电池以提高功率转移率。