摘要:
The present invention relates to a method for producing a DNA chip, which comprises the steps of: (a) cloning a probe, where a linker is coupled to one or both ends of an oligonucleotide to be integrated on a slide, into a vector; (b) transforming host cells with the vector; (c) culturing the transformed host cells, to recover the probe where the linker is coupled to one or both ends of the oligonucleotides; and (d) integrating the recovered double-helical probes on a slide. Also, the present invention relates to a DNA chip for HPV diagnosis produced by the method, and a method for diagnosing the presence or genotype of HPV using the DNA chip.
摘要:
The present invention relates to a method for producing a DNA chip, which comprises the steps of: (a) cloning a probe, where a linker is coupled to one or both ends of an oligonucleotide to be integrated on a slide, into a vector; (b) transforming host cells with the vector; (c) culturing the transformed host cells, to recover the probe where the linker is coupled to one or both ends of the oligonucleotides; and (d) integrating the recovered double-helical probes on a slide. Also, the present invention relates to a DNA chip for HPV diagnosis produced by the method, and a method for diagnosing the presence or genotype of HPV using the DNA chip.
摘要:
In a method of forming carbon nano-tubes, a catalytic film is formed on a substrate. The catalytic film is then transformed into preliminary catalytic particles. Thereafter, the preliminary catalytic particles are transformed into catalytic particles. Carbon nano-tubes then grow from the catalytic particles. The carbon nano-tubes have relatively high conductivity and high number density.
摘要:
In a method of forming a wiring having a carbon nanotube, a lower wiring is formed on a substrate, and a catalyst layer is formed on the lower wiring. An insulating interlayer is formed on the substrate to cover the catalyst layer, and an opening is formed through the insulating interlayer to expose an upper face of the catalyst layer. A carbon nanotube wiring is formed in the opening, and an upper wiring is formed on the carbon nanotube wiring and the insulating interlayer to be electrically connected to the carbon nanotube wiring. A thermal stress is generated between the carbon nanotube wiring and the upper wiring to produce a dielectric breakdown of a native oxide layer formed on a surface of the carbon nanotube wiring. A wiring having a reduced electrical resistance between the carbon nanotube wiring and the upper wiring may be obtained.
摘要:
A method of forming a nanoscale structure includes providing a substrate having a first layer thereon, the first layer having an opening that exposes a region of the substrate, and contacting the substrate with a catalytic material, wherein the exposed region of the substrate has a first property that attracts the catalytic material, and the first layer has a second property that repels the catalytic material.
摘要:
A method of forming a carbon nanotube includes forming a cavity between a substrate and a first layer on the substrate. The cavity extends in a wiring pattern and includes a metal catalyst pattern in the cavity. The carbon nanotube is formed from the metal catalyst pattern and extends inside the cavity along the wiring pattern. Related methods and devices are also discussed.
摘要:
A device includes an insulating layer on a substrate having a lower conductive pattern, the insulating layer having a contact hole that penetrates the insulating layer and exposes a portion of the lower conductive pattern, a catalytic pattern having a first portion on the exposed portion of the lower conductive pattern and a second portion on a sidewall of the contact hole, a spacer on the sidewall of the contact hole, wherein the second portion of the catalytic pattern is disposed between the spacer and the sidewall, and a contact plug in the contact hole and contacting the catalytic pattern, the contact plug being a carbon nanotube material.
摘要:
A semiconductor device includes a substrate, an insulating layer having an opening, the opening exposing a portion of the substrate, a hydrophobic layer covering substantially only a sidewall and a top surface of the insulating layer, and a nanoscale conductive structure on the exposed portion of the substrate.
摘要:
Provided are a vertical interconnection structure including carbon nanotubes and a method of fabricating the same. The vertical interconnection structure includes a substrate; a lower electrode formed on the substrate; a catalyst layer formed on the lower electrode; an inactivated catalyst layer covering the lower electrode and having a first hole exposing the catalyst layer; an insulating layer which is formed on the inert catalyst layer and has a second hole connected to the first hole; a plurality of carbon nanotubes grown from an exposed area of the catalyst layer by the first hole; an upper electrode on the insulating layer being electrically connected to the carbon nanotubes, the inactivated catalyst layer is formed through a thermal reaction between the catalyst layer covering the lower electrode except for the catalyst layer in the first hole and a passivation layer having a third hole corresponding to the second hole.
摘要:
A method of manufacturing a memory device having a carbon nanotube can be provided by forming a lower electrode on a substrate and forming an insulating interlayer on the lower electrode. An upper electrode including a diode can be formed on the insulating interlayer, where the upper electrode can have a first void exposing a sidewall of the diode and a portion of the insulating interlayer. A portion of the insulating interlayer can be partially removed to form an insulating interlayer pattern having a second void that exposes a portion of the lower electrode, where the second void can be connected with the first void. A carbon nanotube wiring can be formed from the lower electrode through the second and first voids, where the carbon nanotube wiring may be capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode.