公开(公告)号：US06492665B1

公开(公告)日：2002-12-10

申请号：US09714130

申请日：2000-11-17

申请人： Susumu Akamatsu ,  Toshitaka Hibi ,  Takehiko Ueda ,  Tadami Shimizu ,  Yoshiaki Kato ,  Tatsuya Obata ,  Toyoyuki Shimazaki

发明人： Susumu Akamatsu ,  Toshitaka Hibi ,  Takehiko Ueda ,  Tadami Shimizu ,  Yoshiaki Kato ,  Tatsuya Obata ,  Toyoyuki Shimazaki

IPC分类号： H01L31072

CPC分类号： H01L29/665 ,  H01L21/76897 ,  H01L21/823475 ,  H01L29/1045 ,  H01L29/6653 ,  H01L29/66598 ,  H01L29/7833 ,  Y10S257/90

摘要： After a gate insulating film, a gate electrode and an on-gate protective layer have been formed in this order on an Si substrate, lightly-doped source/drain regions are formed in the substrate. First and second sidewalls are formed on the sides of the gate electrode and then heavily-doped source/drain regions are formed by implanting dopant ions using these sidewalls as a mask. After the second sidewall has been selectively removed, pocket implanted regions are formed and an overall protective film is deposited. Thereafter, an interlevel dielectric film is deposited, contact holes are formed to reach the heavily-doped source/drain regions and then plug electrodes are formed. Since the second sidewall has already been removed when the overall protective film is deposited, the gap between adjacent gate electrodes is not completely filled in. Accordingly, it is possible to provide a method for fabricating a semiconductor device contributing to device miniaturization without causing a shortcircuit between the gate electrode and a contact member.

摘要翻译： 在栅极绝缘膜之后，在Si衬底上依次形成栅电极和栅极保护层，在衬底中形成轻掺杂源极/漏极区。 第一和第二侧壁形成在栅电极的侧面上，然后通过使用这些侧壁作为掩模注入掺杂剂离子形成重掺杂的源/漏区。 在第二侧壁被选择性地去除之后，形成袋注入区域并且沉积整个保护膜。 此后，沉积层间电介质膜，形成接触孔以到达重掺杂的源/漏区，然后形成插塞电极。 由于当整个保护膜沉积时第二侧壁已经被去除，所以相邻栅电极之间的间隙没有被完全填充。因此，可以提供一种用于制造半导体器件的方法，该半导体器件有助于器件小型化而不引起短路 在栅电极和接触构件之间。

公开(公告)号：US06180472B2

公开(公告)日：2001-01-30

申请号：US09361219

申请日：1999-07-27

申请人： Susumu Akamatsu ,  Toshitaka Hibi ,  Takehiko Ueda ,  Tadami Shimizu ,  Yoshiaki Kato ,  Tatsuya Obata ,  Toyoyuki Shimazaki

发明人： Susumu Akamatsu ,  Toshitaka Hibi ,  Takehiko Ueda ,  Tadami Shimizu ,  Yoshiaki Kato ,  Tatsuya Obata ,  Toyoyuki Shimazaki

IPC分类号： H01L21336

CPC分类号： H01L29/665 ,  H01L21/76897 ,  H01L21/823475 ,  H01L29/1045 ,  H01L29/6653 ,  H01L29/66598 ,  H01L29/7833 ,  Y10S257/90

摘要： After a gate insulating film, a gate electrode and an on-gate protective layer have been formed in this order on an Si substrate, lightly-doped source/drain regions are formed in the substrate. First and second sidewalls are formed on the sides of the gate electrode and then heavily-doped source/drain regions are formed by implanting dopant ions using these sidewalls as a mask. After the second sidewall has been selectively removed, pocket implanted regions are formed and an overall protective film is deposited. Thereafter, an interlevel dielectric film is deposited, contact holes are formed to reach the heavily-doped source/drain regions and then plug electrodes are formed. Since the second sidewall has already been removed when the overall protective film is deposited, the gap between adjacent gate electrodes is not completely filled in. Accordingly, it is possible to provide a method for fabricating a semiconductor device contributing to device miniaturization without causing a shortcircuit between the gate electrode and a contact member.

摘要翻译： 在栅极绝缘膜之后，在Si衬底上依次形成栅电极和栅极保护层，在衬底中形成轻掺杂源极/漏极区。 第一和第二侧壁形成在栅电极的侧面上，然后通过使用这些侧壁作为掩模注入掺杂剂离子形成重掺杂的源/漏区。 在第二侧壁被选择性地去除之后，形成袋注入区域并且沉积整个保护膜。 此后，沉积层间电介质膜，形成接触孔以到达重掺杂的源/漏区，然后形成插塞电极。 由于当整个保护膜沉积时第二侧壁已经被去除，所以相邻栅电极之间的间隙没有被完全填充。因此，可以提供一种用于制造半导体器件的方法，该半导体器件有助于器件小型化而不引起短路 在栅电极和接触构件之间。

公开(公告)号：US20090233525A1

公开(公告)日：2009-09-17

申请号：US11921008

申请日：2006-05-16

申请人： Takehiko Ueda ,  Hosei Nakahira ,  Akira Ishikawa

发明人： Takehiko Ueda ,  Hosei Nakahira ,  Akira Ishikawa

IPC分类号： B24B49/04 ,  B24B49/12 ,  H01L21/304

CPC分类号： G01N21/55 ,  B24B37/013 ,  B24B49/12 ,  G01N21/9501 ,  H01L21/3212 ,  H01L22/26

摘要： The spectral reflectance spectrum of an object of polishing that has reached the polishing endpoint is found ahead of time, the spectral reflectance spectrum of the object of polishing is found during polishing, and the correlation coefficient of these is seen as parameter 1. Meanwhile, the sum of the absolute values of the difference between the first order differentials of these is seen as parameter 2. Then, when parameter 1 is in a range exceeding a specific value, and parameter 2 is at its minimum, it is concluded that the polishing endpoint has been reached. Thus, it is possible to provide a method for detecting the polishing endpoint in a highly reliable CMP polishing apparatus.

摘要翻译： 已经提前到达抛光终点的抛光对象的光谱反射光谱，在研磨过程中发现抛光对象的光谱反射光谱，其相关系数被视为参数1。同时， 将这些的一阶微分之差的绝对值之和视为参数2.然后，当参数1在超过特定值的范围内且参数2处于最小值时，得出结论：抛光端点 已经到达 因此，可以提供一种用于在高可靠性CMP抛光装置中检测抛光终点的方法。

公开(公告)号：US06489624B1

公开(公告)日：2002-12-03

申请号：US09119162

申请日：1998-07-20

申请人： Yoshijiro Ushio ,  Takehiko Ueda ,  Eiji Matsukawa ,  Motoo Koyama

发明人： Yoshijiro Ushio ,  Takehiko Ueda ,  Eiji Matsukawa ,  Motoo Koyama

IPC分类号： G01N2186

CPC分类号： G01B11/0683

摘要： Apparatus and methods are disclosed that measure the thickness of a layer on a workpiece such as a semiconductor wafer, especially as the layer is undergoing a process such as polishing to achieve planarization of the layer. The apparatus comprises a probe light optical system that directs a beam of probe light to be incident on a surface of the layer, and produce a signal light from reflection of the probe light from or transmission of the probe light through the layer. A light detector retrieves and detects sufficient wavelengths of the signal light to produce a corresponding electronic signal encoding data regarding the intensity at various wavelengths of the signal light. At least one of the following is monitored: appearance or disappearance of maxima or minima in a spectrum of intensity or transmittance of the signal light, a change in wavelength at which a maximum or minimum is located in the spectrum, and change in intensity at a particular wavelength at which a maximum or minimum is located in the spectrum. The apparatus can be included with a polishing apparatus.

摘要翻译： 公开了测量诸如半导体晶片的工件上的层的厚度的装置和方法，特别是当该层经历诸如抛光的工艺以实现该层的平坦化时。 该装置包括探针光学系统，其将探测光束引导入入层的表面，并产生来自探测光的反射的信号光或探测光透过该层的透射。 光检测器检索并检测信号光的足够的波长，以产生相应的电子信号，该信号编码关于信号光的各种波长的强度的数据。 监视以下中的至少一个：信号光的强度或透射光谱中的最大值或最小值的出现或消失，最大或最小位于光谱中的波长变化，以及在 最大或最小位于光谱中的特定波长。 该装置可以包括在抛光装置中。

公开(公告)号：US07169016B2

公开(公告)日：2007-01-30

申请号：US11275715

申请日：2006-01-25

申请人： Andrew H. Barada ,  Takehiko Ueda

发明人： Andrew H. Barada ,  Takehiko Ueda

IPC分类号： B24B49/12

CPC分类号： B24B37/013 ,  B24B49/12

摘要： Methods and apparatus for substantially continuously measuring the surface of a wafer during a polishing process are disclosed. According to one aspect of the present invention, an apparatus includes a wafer support table that supports a wafer, a polishing pad that polishes a surface of the wafer, and a polishing pad structure that rotates the polishing pad over the surface of the wafer. The apparatus also includes a measuring device which is capable of continuously measuring the surface of the wafer during polishing of the surface of the wafer.

摘要翻译： 公开了在抛光过程中基本上连续地测量晶片表面的方法和装置。 根据本发明的一个方面，一种装置包括支撑晶片的晶片支撑台，抛光晶片表面的研磨垫，以及抛光垫结构，该抛光垫结构使抛光垫在晶片的表面上旋转。 该装置还包括测量装置，其能够在抛光晶片表面期间连续地测量晶片的表面。

公开(公告)号：US07052920B2

公开(公告)日：2006-05-30

申请号：US09881445

申请日：2001-06-13

申请人： Yoshijiro Ushio ,  Takehiko Ueda

发明人： Yoshijiro Ushio ,  Takehiko Ueda

IPC分类号： G01R31/26

CPC分类号： B24B37/013 ,  B24B49/04 ,  B24B49/12 ,  G01B11/0683 ,  H01L22/12 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and apparatus are disclosed for detecting a thickness of a surficial layer (e.g., metal or insulating layer) on a workpiece (e.g., semiconductor wafer) during a process for planarizing the layer, so as to stop the process when a suitable process endpoint is reached. Layer thickness is detected based on a spectral-characteristic signal of reflected or transmitted signal light, obtained by directing a probe light onto the surface of the workpiece. Example spectral characteristics are local maxima and minima of signal-light waveform, differences or quotients of the same, a dispersion of the signal-light waveform, a component of a Fourier transform of the signal waveform, a cross-correlation function of the signal waveform. Alternatively, the zeroth order of signal light is selected for measurement, or a spatial coherence length of the probe light is compared with the degree of fineness of the pattern on the surface illuminated with the probe light. An optical model can be determined based on the comparison, and at least one of the layer thickness and the process endpoint is detected by comparing the measured signal-light intensity with the calculated theoretical signal light intensity.

摘要翻译： 公开了用于在平坦化层的过程期间检测工件（例如，半导体晶片）上的表面层（例如，金属或绝缘层）的厚度的方法和装置，以便当合适的过程端点为 到达。 基于通过将探测光引导到工件的表面而获得的反射或透射信号光的光谱特征信号来检测层厚度。 示例光谱特征是信号光波形的局部最大值和最小值，差值或商数，信号光波形的色散，信号波形的傅立叶变换的分量，信号波形的互相关函数 。 或者，选择信号光的零级顺序进行测量，或者将探测光的空间相干长度与用探测光照射的表面上的图案的细度的程度进行比较。 可以基于比较来确定光学模型，并且通过将测量的信号光强度与计算的理论信号光强度进行比较来检测层厚度和过程终点中的至少一个。

公开(公告)号：US06670200B2

公开(公告)日：2003-12-30

申请号：US09881224

申请日：2001-06-13

申请人： Yoshijiro Ushio ,  Takehiko Ueda

发明人： Yoshijiro Ushio ,  Takehiko Ueda

IPC分类号： H01L2100

CPC分类号： B24B37/013 ,  B24B49/04 ,  B24B49/12 ,  G01B11/0683 ,  H01L22/12 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and apparatus are disclosed for detecting a thickness of a surficial layer (e.g., metal or insulating layer) on a workpiece (e.g., semiconductor wafer) during a process for planarizing the layer, so as to stop the process when a suitable process endpoint is reached. Layer thickness is detected based on a spectral-characteristic signal of reflected or transmitted signal light, obtained by directing a probe light onto the surface of the workpiece. Example spectral characteristics are local maxima and minima of signal-light waveform, differences or quotients of the same, a dispersion of the signal-light waveform, a component of a Fourier transform of the signal waveform, a cross-correlation function of the signal waveform. Alternatively, the zeroth order of signal light is selected for measurement, or a spatial coherence length of the probe light is compared with the degree of fineness of the pattern on the surface illuminated with the probe light. An optical model can be determined based on the comparison, and at least one of the layer thickness and the process endpoint is detected by comparing the measured signal-light intensity with the calculated theoretical signal-light intensity.

摘要翻译： 公开了用于在平坦化层的过程期间检测工件（例如，半导体晶片）上的表面层（例如，金属或绝缘层）的厚度的方法和装置，以便当合适的过程端点为 到达。 基于通过将探测光引导到工件的表面而获得的反射或透射信号光的光谱特征信号来检测层厚度。 示例光谱特征是信号光波形的局部最大值和最小值，差值或商数，信号光波形的色散，信号波形的傅立叶变换的分量，信号波形的互相关函数 。 或者，选择信号光的零级顺序进行测量，或者将探测光的空间相干长度与用探测光照射的表面上的图案的细度的程度进行比较。 可以基于比较来确定光学模型，并且通过将测量的信号光强度与计算的理论信号光强度进行比较来检测层厚度和处理终点中的至少一个。

公开(公告)号：US09031687B2

公开(公告)日：2015-05-12

申请号：US12749306

申请日：2010-03-29

申请人： Tatsuya Senga ,  Akira Ishikawa ,  Takehiko Ueda

发明人： Tatsuya Senga ,  Akira Ishikawa ,  Takehiko Ueda

IPC分类号： H01L21/66 ,  B24B49/04 ,  B24B37/04 ,  B24B49/00 ,  H01L21/321

CPC分类号： H01L22/26 ,  B24B37/042 ,  B24B49/00 ,  B24B49/04 ,  H01L21/3212

摘要： The relationship between polishing conditions constituting elements and the worked shape (amount of polishing) obtained by means of these polishing conditions is input beforehand into polishing condition determining means along with the type of the object of polishing, and polishing conditions (invariable polishing conditions) that are used in common for the polishing of this object of polishing. The polishing condition determining means determine the polishing conditions on the basis of these conditions. Specifically, the above-mentioned polishing conditions constituting elements are given in a time series, or combinations of the above-mentioned polishing conditions constituting elements are converted into variations in the swinging velocity of the polishing body, and the swinging velocity corresponding to the swinging position is determined. The polishing apparatus control means input the polishing conditions determined by the polishing condition determining means, and control the polishing apparatus so that these polishing conditions are realized. As a result, working conditions for obtaining a specified worked shape in a working apparatus can be simply and accurately determined.

摘要翻译： 抛光条件构成要素与通过这些研磨条件获得的加工形状（抛光量）之间的关系与抛光对象的类型以及抛光条件（不变的抛光条件）预先输入到抛光条件确定装置中， 被普遍用于抛光抛光的目的。 抛光条件确定装置基于这些条件确定抛光条件。 具体地说，以时间序列给出上述构成元件的抛光条件，或者将上述抛光条件构成元件的组合转换为抛光体的摆动速度的变化，并且与摆动位置相对应的摆动速度 决心，决意，决定。 抛光装置控制装置输入由抛光条件确定装置确定的抛光条件，并且控制抛光装置以便实现这些抛光条件。 结果，可以简单且准确地确定在工作装置中获得规定加工形状的工作条件。

公开(公告)号：US06963407B2

公开(公告)日：2005-11-08

申请号：US09819977

申请日：2001-03-29

申请人： Hiroyuki Abe ,  Takehiko Ueda

发明人： Hiroyuki Abe ,  Takehiko Ueda

IPC分类号： G01B11/06 ,  B24B37/013 ,  B24B37/04 ,  B24B49/04 ,  B24B49/12 ,  G01B9/02 ,  G01B11/28 ,  H01J40/14 ,  H01L21/304 ,  H01L21/306 ,  H01L21/66

CPC分类号： B24B37/013 ,  B24B37/04 ,  B24B49/04 ,  B24B49/12

摘要： A detection apparatus for detecting the process end point in the removal process of a layer on a wafer in an IC or other semiconductor device manufacturing process. This point can be detected in-situ and at high precision even when there is a pattern on the surface, or when there is no distinct change in the polishing layer, or when there is disturbance caused by a difference in the detection position or the slurry. Two or more characteristic quantities are extracted from a signal waveform obtained by irradiating a substrate surface with white light and detecting the reflected signal light or the transmitted signal light or both, fuzzy rules, etc., are used in performing detection by using these two or more characteristic quantities to perform a logical operation, and tuning is performed.

摘要翻译： 一种用于检测IC或其它半导体器件制造工艺中的晶片上的层的去除处理中的处理终点的检测装置。 即使在表面存在图形，或者当抛光层没有明显变化时，或者当由于检测位置或浆料的差异引起的干扰时，该点可以原位和高精度地检测 。 从通过用白光照射基板表面而获得的信号波形中提取两个或更多个特征量，并且检测反射信号光或透射信号光或两者，使用模糊规则等进行检测，通过使用这两个或 执行逻辑操作的更多特征量，并且执行调谐。

公开(公告)号：US6051444A

公开(公告)日：2000-04-18

申请号：US215153

申请日：1998-12-18

申请人： Toshimi Watanabe ,  Toru Iwane ,  Itaru Homma ,  Takehiko Ueda

发明人： Toshimi Watanabe ,  Toru Iwane ,  Itaru Homma ,  Takehiko Ueda

IPC分类号： G02F1/1333 ,  G02F1/1334 ,  H01L21/00

CPC分类号： G02F1/1334

摘要： A method of manufacturing a liquid crystal display element having characteristics of voltage-transparency, and the like, which differ locally. The method of manufacturing the liquid crystal display device includes a step of injecting a mixture of photohardening resin and liquid crystal between two substrates, and a step of exposing the injected mixture to light which causes photohardening of the mixture. The step of exposing the mixture to light includes exposing at least two pattern regions which become different from each other under photohardening conditions.

摘要翻译： 具有局部不同的具有电压透明性等特性的液晶显示元件的制造方法。 制造液晶显示装置的方法包括将光硬化树脂和液晶的混合物注入两个基板之间的步骤，以及将注入的混合物暴露于导致混合物光硬化的光的步骤。 将混合物曝光的步骤包括在光硬化条件下暴露彼此变得不同的至少两个图案区域。