公开(公告)号：US20230154760A1

公开(公告)日：2023-05-18

申请号：US18156123

申请日：2023-01-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiann-Horng Lin ,  Cheng-Li Fan ,  Chih-Hao Chen

IPC: H01L21/308 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

CPC classification number: H01L21/3086 ,  H01L21/76877 ,  H01L21/76807 ,  H01L21/32137 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/31138 ,  H01L21/32139

Abstract: A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

公开(公告)号：US20220148918A1

公开(公告)日：2022-05-12

申请号：US17586412

申请日：2022-01-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Wei Huang ,  Cheng-Li Fan ,  Yu-Yu Chen

IPC: H01L21/768 ,  H01L23/535 ,  H01L21/033 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311

Abstract: A method for reducing wiggling in a line includes forming a first patterning layer over a metal feature and depositing a first mask layer over the first patterning layer. The first mask layer is patterned to form a first set of one or more openings therein and then thinned. The pattern of the first mask layer is transferred to the first patterning layer to form a second set of one or more openings therein. The first patterning layer is etched to widen the second set of one or more openings. The first patterning layer may be comprised of silicon or an oxide material. The openings in the first patterning layer may be widened while a mask layer is over the first patterning layer.

公开(公告)号：US20190035638A1

公开(公告)日：2019-01-31

申请号：US15833077

申请日：2017-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Li Fan ,  Chih-Hao Chen ,  Wen-Yen Chen

IPC: H01L21/311 ,  H01L21/768

CPC classification number: H01L21/31144 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76877

Abstract: Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.

公开(公告)号：US10347506B2

公开(公告)日：2019-07-09

申请号：US15833077

申请日：2017-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Li Fan ,  Chih-Hao Chen ,  Wen-Yen Chen

IPC: H01L21/311 ,  H01L21/768

Abstract: Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.