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公开(公告)号:US12021047B2
公开(公告)日:2024-06-25
申请号:US17727242
申请日:2022-04-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chung-Hao Tsai , Chia-Chia Lin , Kai-Chiang Wu , Chuei-Tang Wang , Chen-Hua Yu
IPC: H01L21/56 , H01L21/48 , H01L23/00 , H01L23/14 , H01L23/31 , H01L23/48 , H01L23/498 , H01L23/522 , H01L23/525 , H01L23/66 , H01L25/065 , H01L25/07 , H01L49/02
CPC classification number: H01L24/04 , H01L21/486 , H01L21/56 , H01L23/145 , H01L23/31 , H01L23/3128 , H01L23/481 , H01L23/49827 , H01L23/49838 , H01L23/5227 , H01L23/525 , H01L23/66 , H01L24/13 , H01L24/18 , H01L24/19 , H01L24/20 , H01L25/0652 , H01L25/071 , H01L28/10 , H01L21/561 , H01L2223/6672 , H01L2223/6677 , H01L2224/02205 , H01L2224/02215 , H01L2224/0231 , H01L2224/02331 , H01L2224/02373 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/10122 , H01L2224/13024 , H01L2224/18 , H01L2224/92244
Abstract: An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.
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公开(公告)号:US11450628B2
公开(公告)日:2022-09-20
申请号:US16846416
申请日:2020-04-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tzu-Chun Tang , Chung-Hao Tsai , Chen-Hua Yu , Chuei-Tang Wang , Chia-Chia Lin
Abstract: Provided is a package structure including a first die; a plurality of through vias, aside the first die; a first encapsulant laterally encapsulating the first die and the plurality of through vias; a first redistribution layer (RDL) structure on first sides of the first die, plurality of through vias, and the first encapsulant; a second RDL structure on second sides of the first die, the plurality of through vias, and the first encapsulant; and a plurality of conductive connectors, electrically connected to the second RDL structure. Portions of the first RDL structure, the plurality of through vias, and the second RDL structure are electrically connected to each other and form a solenoid inductor laterally aside the first die.
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公开(公告)号:US20210183794A1
公开(公告)日:2021-06-17
申请号:US16846416
申请日:2020-04-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tzu-Chun Tang , Chung-Hao Tsai , Chen-Hua Yu , Chuei-Tang Wang , Chia-Chia Lin
Abstract: Provided is a package structure including a first die; a plurality of through vias, aside the first die; a first encapsulant laterally encapsulating the first die and the plurality of through vias; a first redistribution layer (RDL) structure on first sides of the first die, plurality of through vias, and the first encapsulant; a second RDL structure on second sides of the first die, the plurality of through vias, and the first encapsulant; and a plurality of conductive connectors, electrically connected to the second RDL structure. Portions of the first RDL structure, the plurality of through vias, and the second RDL structure are electrically connected to each other and form a solenoid inductor laterally aside the first die.
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公开(公告)号:US20240241316A1
公开(公告)日:2024-07-18
申请号:US18155131
申请日:2023-01-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Chuei-Tang Wang , Chia-Chia Lin , Chung-Hao Tsai
CPC classification number: G02B6/13 , H01L24/08 , H01L24/80 , H01L25/167 , H04B10/50 , H01L2224/08225 , H01L2224/80895 , H01L2224/80896
Abstract: An optical interposer is utilized in order to send and receive signals from external sources such as an optical fiber. The optical interposer receives the signals, routes the signals to various attached components, and when desired, converts the signals between optical and electrical signals. The various attached components may include memory devices such as a high bandwidth memory, processing components, such as an xPU, combinations of these, or the like.
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公开(公告)号:US20220246559A1
公开(公告)日:2022-08-04
申请号:US17727242
申请日:2022-04-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chung-Hao Tsai , Chia-Chia Lin , Kai-Chiang Wu , Chuei-Tang Wang , Chen-Hua Yu
IPC: H01L23/00 , H01L21/56 , H01L23/31 , H01L21/48 , H01L23/522 , H01L23/66 , H01L23/498 , H01L23/48 , H01L25/07 , H01L23/525 , H01L49/02 , H01L23/14 , H01L25/065
Abstract: An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.
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公开(公告)号:US20240297131A1
公开(公告)日:2024-09-05
申请号:US18663697
申请日:2024-05-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chung-Hao Tsai , Chia-Chia Lin , Kai-Chiang Wu , Chuei-Tang Wang , Chen-Hua Yu
IPC: H01L23/00 , H01L21/48 , H01L21/56 , H01L23/14 , H01L23/31 , H01L23/48 , H01L23/498 , H01L23/522 , H01L23/525 , H01L23/66 , H01L25/065 , H01L25/07
CPC classification number: H01L24/04 , H01L21/486 , H01L21/56 , H01L23/145 , H01L23/31 , H01L23/3128 , H01L23/481 , H01L23/49827 , H01L23/49838 , H01L23/5227 , H01L23/525 , H01L23/66 , H01L24/13 , H01L24/18 , H01L24/19 , H01L24/20 , H01L25/0652 , H01L25/071 , H01L28/10 , H01L21/561 , H01L2223/6672 , H01L2223/6677 , H01L2224/02205 , H01L2224/02215 , H01L2224/0231 , H01L2224/02331 , H01L2224/02373 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/10122 , H01L2224/13024 , H01L2224/18 , H01L2224/92244
Abstract: An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.
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