公开(公告)号：US12021047B2

公开(公告)日：2024-06-25

申请号：US17727242

申请日：2022-04-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chung-Hao Tsai ,  Chia-Chia Lin ,  Kai-Chiang Wu ,  Chuei-Tang Wang ,  Chen-Hua Yu

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/14 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/525 ,  H01L23/66 ,  H01L25/065 ,  H01L25/07 ,  H01L49/02

CPC分类号： H01L24/04 ,  H01L21/486 ,  H01L21/56 ,  H01L23/145 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5227 ,  H01L23/525 ,  H01L23/66 ,  H01L24/13 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0652 ,  H01L25/071 ,  H01L28/10 ,  H01L21/561 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2224/02205 ,  H01L2224/02215 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/10122 ,  H01L2224/13024 ,  H01L2224/18 ,  H01L2224/92244

摘要： An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.

公开(公告)号：US09484316B2

公开(公告)日：2016-11-01

申请号：US14070334

申请日：2013-11-01

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig ,  Ulrike Fastner ,  Alexander Heinrich ,  Thomas Fischer

IPC分类号： H01L23/00 ,  H01L21/78 ,  H01L21/308 ,  H01L21/683

CPC分类号： H01L24/05 ,  H01L21/268 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02205 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/10126 ,  H01L2224/11009 ,  H01L2224/11011 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11845 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/26125 ,  H01L2224/27009 ,  H01L2224/27019 ,  H01L2224/2746 ,  H01L2224/2747 ,  H01L2224/27845 ,  H01L2224/29007 ,  H01L2224/29013 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。 衬底包括由切口区域分隔开的器件区域。 接触层设置在切口区域和器件区域中。 在器件区域上形成结构化的焊料层。 在形成结构化的焊料层之后，在切割区域处露出接触层。 切割区域中的接触层和基底。

公开(公告)号：US20150076713A1

公开(公告)日：2015-03-19

申请号：US14026742

申请日：2013-09-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Hao Tsai ,  Li-Hui Cheng ,  Jui-Pin Hung ,  Jing-Cheng Lin

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L25/00

CPC分类号： H01L24/96 ,  H01L21/31053 ,  H01L21/311 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/02205 ,  H01L2224/0231 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13026 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/04642 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0549 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/12042 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/3512 ,  H01L2924/00

摘要： A package includes a first die and a second die. The first die includes a first substrate and a first metal pad overlying the first substrate. The second die includes a second substrate and a second metal pad overlying the second substrate. A molding compound molds the first die and the second die therein. The molding compound has a first portion between the first die and the second die, and a second portion, which may form a ring encircles the first portion. The first portion and the second portion are on opposite sides of the first die. The first portion has a first top surface. The second portion has a second top surface higher than the first top surface.

摘要翻译： 包装包括第一模具和第二模具。 第一管芯包括第一衬底和覆盖第一衬底的第一金属焊盘。 第二管芯包括第二衬底和覆盖第二衬底的第二金属焊盘。 模塑料在其中模制第一模具和第二模具。 模塑料具有在第一模具和第二模具之间的第一部分，并且可形成环的第二部分环绕第一部分。 第一部分和第二部分在第一模具的相对侧上。 第一部分具有第一顶面。 第二部分具有高于第一顶表面的第二顶表面。

公开(公告)号：US08563397B2

公开(公告)日：2013-10-22

申请号：US12498462

申请日：2009-07-07

申请人： Akihiro Chida

发明人： Akihiro Chida

IPC分类号： H01L21/30

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2221/6835 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/02205 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/111 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11438 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13364 ,  H01L2224/13366 ,  H01L2224/13369 ,  H01L2224/1338 ,  H01L2224/13381 ,  H01L2224/16146 ,  H01L2224/81005 ,  H01L2224/81101 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83005 ,  H01L2224/83101 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K1/0366 ,  H05K1/095 ,  H05K3/002 ,  H05K3/4069 ,  H05K3/4644 ,  H05K2201/029 ,  H05K2203/1163 ,  H01L2224/03436 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/035 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： The present invention relates to a semiconductor device and its manufacturing method including the steps of: forming a first semiconductor element layer having a first wiring over a substrate; forming a second semiconductor element layer having a second wiring and fixed to a first structure body having a first sheet-like fiber body, a first organic resin, and a first electrode; preparing a second structure body having a second sheet-like fiber body, a second organic resin which is not cured, and a second electrode; disposing the second structure body between the first and second semiconductor element layers so that the first wiring, the second electrode, and the second wiring are overlapped with each other over the substrate; and curing the second organic resin.

摘要翻译： 半导体器件及其制造方法技术领域本发明涉及半导体器件及其制造方法，包括以下步骤：在衬底上形成具有第一布线的第一半导体元件层; 形成具有第二布线并固定到具有第一片状纤维体，第一有机树脂和第一电极的第一结构体的第二半导体元件层; 制备具有第二片状纤维体的第二结构体，未固化的第二有机树脂和第二电极; 将第二结构体设置在第一和第二半导体元件层之间，使得第一布线，第二电极和第二布线在基板上彼此重叠; 并固化第二有机树脂。

公开(公告)号：US20100171221A1

公开(公告)日：2010-07-08

申请号：US12498462

申请日：2009-07-07

申请人： Akihiro CHIDA

发明人： Akihiro CHIDA

IPC分类号： H01L23/52 ,  H01L21/98

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2221/6835 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/02205 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/111 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11438 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13364 ,  H01L2224/13366 ,  H01L2224/13369 ,  H01L2224/1338 ,  H01L2224/13381 ,  H01L2224/16146 ,  H01L2224/81005 ,  H01L2224/81101 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83005 ,  H01L2224/83101 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K1/0366 ,  H05K1/095 ,  H05K3/002 ,  H05K3/4069 ,  H05K3/4644 ,  H05K2201/029 ,  H05K2203/1163 ,  H01L2224/03436 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/035 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： The present invention relates to a semiconductor device and its manufacturing method including the steps of: forming a first semiconductor element layer having a first wiring over a substrate; forming a second semiconductor element layer having a second wiring and fixed to a first structure body having a first sheet-like fiber body, a first organic resin, and a first electrode; preparing a second structure body having a second sheet-like fiber body, a second organic resin which is not cured, and a second electrode; disposing the second structure body between the first and second semiconductor element layers so that the first wiring, the second electrode, and the second wiring are overlapped with each other over the substrate; and curing the second organic resin.

摘要翻译： 半导体器件及其制造方法技术领域本发明涉及半导体器件及其制造方法，包括以下步骤：在衬底上形成具有第一布线的第一半导体元件层; 形成具有第二布线并固定到具有第一片状纤维体，第一有机树脂和第一电极的第一结构体的第二半导体元件层; 制备具有第二片状纤维体的第二结构体，未固化的第二有机树脂和第二电极; 将第二结构体设置在第一和第二半导体元件层之间，使得第一布线，第二电极和第二布线在基板上彼此重叠; 并固化第二有机树脂。

公开(公告)号：US10062662B2

公开(公告)日：2018-08-28

申请号：US14858530

申请日：2015-09-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Hao Tsai ,  Li-Hui Cheng ,  Jui-Pin Hung ,  Jing-Cheng Lin

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L21/683 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/78 ,  H01L23/31

CPC分类号： H01L24/96 ,  H01L21/31053 ,  H01L21/311 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/02205 ,  H01L2224/0231 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13026 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/04642 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0549 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/12042 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/3512 ,  H01L2924/00

摘要： A package includes a first die and a second die. The first die includes a first substrate and a first metal pad overlying the first substrate. The second die includes a second substrate and a second metal pad overlying the second substrate. A molding compound molds the first die and the second die therein. The molding compound has a first portion between the first die and the second die, and a second portion, which may form a ring encircles the first portion. The first portion and the second portion are on opposite sides of the first die. The first portion has a first top surface. The second portion has a second top surface higher than the first top surface.

公开(公告)号：US20160013150A1

公开(公告)日：2016-01-14

申请号：US14858530

申请日：2015-09-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Hao Tsai ,  Li-Hui Cheng ,  Jui-Pin Hung ,  Jing-Cheng Lin

IPC分类号： H01L23/00 ,  H01L21/683 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L24/96 ,  H01L21/31053 ,  H01L21/311 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/02205 ,  H01L2224/0231 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13026 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/04642 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0549 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/12042 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/3512 ,  H01L2924/00

摘要： A package includes a first die and a second die. The first die includes a first substrate and a first metal pad overlying the first substrate. The second die includes a second substrate and a second metal pad overlying the second substrate. A molding compound molds the first die and the second die therein. The molding compound has a first portion between the first die and the second die, and a second portion, which may form a ring encircles the first portion. The first portion and the second portion are on opposite sides of the first die. The first portion has a first top surface. The second portion has a second top surface higher than the first top surface.

公开(公告)号：US09214435B2

公开(公告)日：2015-12-15

申请号：US13476056

申请日：2012-05-21

申请人： Mukta G. Farooq ,  Troy L. Graves-Abe ,  Spyridon Skordas ,  Kevin R. Winstel

发明人： Mukta G. Farooq ,  Troy L. Graves-Abe ,  Spyridon Skordas ,  Kevin R. Winstel

IPC分类号： H01L21/768 ,  H01L23/00 ,  H01L23/48 ,  H01L25/065 ,  H01L23/538 ,  H01L27/06

CPC分类号： H01L24/09 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5386 ,  H01L24/80 ,  H01L24/82 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2224/02205 ,  H01L2224/08145 ,  H01L2224/0905 ,  H01L2224/80896 ,  H01L2224/82031 ,  H01L2224/82101 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/3701 ,  H01L2924/00 ,  H01L2224/80

摘要： Circuits incorporating three-dimensional integration and methods of their fabrication are disclosed. One circuit includes a bottom layer and a plurality of upper layers. The bottom layer includes a bottom landing pad connected to functional components in the bottom layer. In addition, the upper layers are stacked above the bottom layer. Each of the upper layers includes a respective upper landing pad that is connected to respective functional components in the respective upper layer. The landing pads are coupled by a single conductive via and are aligned in a stack of the bottom layer and the upper layers such that each of the landing pads is offset from any of the landing pads in an adjacent layer in the stack by at least one pre-determined amount.

摘要翻译： 公开了结合三维积分的电路及其制造方法。 一个电路包括底层和多个上层。 底层包括连接到底层中的功能部件的底部着陆垫。 此外，上层堆叠在底层上方。 每个上层包括相应的上层板，其连接到各个上层中的各个功能部件。 着陆焊盘通过单个导电通孔耦合，并且在底层和上层的堆叠中对准，使得每个着陆焊盘从堆叠中的相邻层中的任何一个着陆焊盘偏移至少一个 预定金额。

公开(公告)号：US20150123264A1

公开(公告)日：2015-05-07

申请号：US14070334

申请日：2013-11-01

申请人： INFINEON TECHNOLOGIES AG

发明人： Evelyn Napetschnig ,  Ulrike Fastner ,  Alexander Heinrich ,  Thomas Fischer

IPC分类号： H01L23/00 ,  H01L21/78

CPC分类号： H01L24/05 ,  H01L21/268 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02205 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/10126 ,  H01L2224/11009 ,  H01L2224/11011 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11845 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/26125 ,  H01L2224/27009 ,  H01L2224/27019 ,  H01L2224/2746 ,  H01L2224/2747 ,  H01L2224/27845 ,  H01L2224/29007 ,  H01L2224/29013 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。 衬底包括由切口区域分隔开的器件区域。 接触层设置在切口区域和器件区域中。 在器件区域上形成结构化的焊料层。 在形成结构化的焊料层之后，在切割区域处露出接触层。 切割区域中的接触层和基底。

公开(公告)号：US20120032329A1

公开(公告)日：2012-02-09

申请号：US13229887

申请日：2011-09-12

申请人： HIROMI SHIGIHARA ,  HIROSHI TSUKAMOTO ,  AKIRA YAJIMA

发明人： HIROMI SHIGIHARA ,  HIROSHI TSUKAMOTO ,  AKIRA YAJIMA

IPC分类号： H01L23/498

CPC分类号： H01L24/05 ,  H01L21/565 ,  H01L22/32 ,  H01L23/485 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02205 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05173 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/06183 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29198 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/46 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48158 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/4868 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/4878 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/4888 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85464 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/0665 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0002 ,  H01L2924/00015

摘要： In semiconductor integrated circuit devices for vehicle use, an aluminum pad on a semiconductor chip and an external device are coupled to each other by wire bonding using a gold wire for the convenience of mounting. Such a semiconductor integrated circuit device, however, causes a connection failure due to the interaction between aluminum and gold in use for a long time at a relatively high temperature (about 150 degrees C.). A semiconductor integrated circuit device can include a semiconductor chip as a part of the device, an electrolytic gold plated surface film (gold-based metal plated film) provided over an aluminum-based bonding pad on a semiconductor chip via a barrier metal film, and a gold bonding wire (gold-based bonding wire) for interconnection between the plated surface film and an external lead provided over a wiring board (wiring substrate).

摘要翻译： 在用于车辆用途的半导体集成电路器件中，半导体芯片上的铝焊盘和外部器件通过使用金线的引线接合彼此耦合以便于安装。 然而，这样的半导体集成电路器件在相对较高的温度（约150℃）下长时间使用铝和金之间的相互作用导致连接故障。 半导体集成电路器件可以包括作为器件的一部分的半导体芯片，经由阻挡金属膜设置在半导体芯片上的铝基焊盘上的电解镀金表面膜（金基金属镀膜），以及 用于在电镀表面膜和设置在布线板（布线基板）上的外部引线之间互连的金接合线（金基接合线）。