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    SENSOR DEVICE AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    SENSOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20190162753A1

    公开(公告)日：2019-05-30

    申请号：US16179644

    申请日：2018-11-02

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Chen Hsiung YANG ,  Chun-Wen CHENG ,  Jiou-Kang LEE

    IPC: G01P15/125 ,  G01L1/18 ,  G01P15/08

    Abstract: A sensor device includes a microelectromechanical system (MEMS) force sensor, and a capacitive acceleration sensor. In the method of manufacturing the sensor device, a sensor portion of the MEMS force sensor is prepared over a front surface of a first substrate. The sensor portion includes a piezo-resistive element and a front electrode. A bottom electrode and a first electrode are formed on a back surface of the first substrate. A second substrate having an electrode pad and a second electrode to the bottom of the first substrate are attached such that the bottom electrode is connected to the electrode pad and the first electrode faces the second electrode with a space therebetween.

    MECHANISMS FOR FORMING MICRO-ELECTRO MECHANICAL SYSTEM DEVICE
    2.
    发明申请
    MECHANISMS FOR FORMING MICRO-ELECTRO MECHANICAL SYSTEM DEVICE 审中-公开
    用于形成微电子机械系统装置的机构

    公开(公告)号：US20170036909A1

    公开(公告)日：2017-02-09

    申请号：US15299161

    申请日：2016-10-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chun-Wen CHENG ,  Chia-Hua CHU

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00285 ,  B81B7/0038 ,  B81B7/02 ,  B81B2201/0264 ,  B81C1/00238 ,  B81C1/00293

    Abstract: A method for forming a micro-electro mechanical system (MEMS) device is provided. The method includes bonding a semiconductor substrate with a carrier substrate through a dielectric layer and patterning the semiconductor substrate into multiple elements. The method also includes partially removing the dielectric layer to release some of the elements such that the released elements become one (or more) first movable element and one (or more) second movable element. The method further includes bonding a cap substrate with the semiconductor substrate to form a first closed chamber containing the first movable element and a second closed chamber containing the second movable element. In addition, the method includes opening the second closed chamber and sealing the second closed chamber after vacuumizing the second closed chamber such that the second closed chamber has a reduced pressure smaller than that of the first closed chamber.

    Abstract translation: 提供了一种用于形成微机电系统（MEMS）装置的方法。 该方法包括通过电介质层将半导体衬底与载体衬底接合并将半导体衬底图案化成多个元件。 该方法还包括部分去除电介质层以释放一些元件，使得释放的元件变为一个（或多个）第一可移动元件和一个（或更多个）第二可移动元件。 该方法还包括将盖衬底与半导体衬底接合以形成容纳第一可移动元件的第一封闭室和包含第二可移动元件的第二封闭室。 此外，该方法包括打开第二封闭室并且在对第二封闭室抽真空之后密封第二封闭室，使得第二封闭室的压力小于第一封闭室的压力。

    MECHANISMS FOR FORMING MICRO-ELECTRO MECHANICAL SYSTEM DEVICE
    3.
    发明申请
    MECHANISMS FOR FORMING MICRO-ELECTRO MECHANICAL SYSTEM DEVICE 有权
    用于形成微电子机械系统装置的机构

    公开(公告)号：US20150097215A1

    公开(公告)日：2015-04-09

    申请号：US14049988

    申请日：2013-10-09

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chia-Hua CHU ,  Chun-Wen CHENG

    IPC: B81B7/00 ,  B81C3/00

    CPC classification number: B81C1/00238 ,  B81B7/0035 ,  B81B7/0041 ,  B81C1/00793 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/0118 ,  B81C2203/0792

    Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a CMOS substrate and a MEMS substrate bonded with the CMOS substrate. The CMOS substrate includes a semiconductor substrate, a first dielectric layer formed over the semiconductor substrate, and a plurality of conductive pads formed in the first dielectric layer. The MEMS substrate includes a semiconductor layer having a movable element and a second dielectric layer formed between the semiconductor layer and the CMOS substrate. The MEMS substrate also includes a closed chamber surrounding the movable element. The MEMS substrate further includes a blocking layer formed between the closed chamber and the first dielectric layer of the CMOS substrate. The blocking layer is configured to block gas, coming from the first dielectric layer, from entering the closed chamber.

    Abstract translation: 提供了用于形成微机电系统（MEMS）装置的机构的实施例。 MEMS器件包括CMOS衬底和与CMOS衬底结合的MEMS衬底。 CMOS衬底包括半导体衬底，形成在半导体衬底上的第一介电层和形成在第一介电层中的多个导电焊盘。 MEMS衬底包括具有可移动元件的半导体层和形成在半导体层和CMOS衬底之间的第二电介质层。 MEMS基板还包括围绕可移动元件的封闭室。 MEMS基板还包括形成在封闭室和CMOS基板的第一介电层之间的阻挡层。 阻挡层被构造成阻挡来自第一介电层的气体进入封闭室。

    MEMS-CMOS INTEGRATED DEVICES, AND METHODS OF INTEGRATION AT WAFER LEVEL
    4.
    发明申请
    MEMS-CMOS INTEGRATED DEVICES, AND METHODS OF INTEGRATION AT WAFER LEVEL 有权
    MEMS-CMOS集成器件，以及在等级上的集成方法

    公开(公告)号：US20150008540A1

    公开(公告)日：2015-01-08

    申请号：US13936380

    申请日：2013-07-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chia-Hua CHU ,  Chun-Wen CHENG

    IPC: B81C1/00 ,  B81B3/00 ,  B81B7/00

    CPC classification number: B81C1/00238 ,  B81B2201/0257 ,  B81C1/00222 ,  B81C1/0023 ,  B81C1/00261 ,  B81C1/00301 ,  B81C2203/0792

    Abstract: A method for forming an integrated semiconductor device includes providing a first wafer, providing a second wafer, and bonding the first wafer over the second wafer. The first wafer includes a first substrate having a microelectromechanical system (MEMS) device layer. The second wafer includes a second substrate having at least one active device, and at least one interconnect layer over the second substrate. The MEMS device layer is connected with the at least one interconnect layer. The method further includes forming at least one conductive plug through the first substrate and the MEMS device layer and inside the at least one interconnect layer, etching the second substrate and the at least one interconnect layer to form a cavity extending from a surface of the second substrate to the MEMS device layer, and etching the first substrate and the MEMS device layer to form a MEMS device interfacing with the cavity.

    Abstract translation: 一种用于形成集成半导体器件的方法包括提供第一晶片，提供第二晶片，以及将第一晶片接合在第二晶片上。 第一晶片包括具有微机电系统（MEMS）器件层的第一衬底。 第二晶片包括具有至少一个有源器件的第二衬底和在第二衬底上的至少一个互连层。 MEMS器件层与至少一个互连层连接。 该方法还包括通过第一衬底和MEMS器件层和至少一个互连层内部形成至少一个导电插塞，蚀刻第二衬底和至少一个互连层以形成从第二衬底的表面延伸的空腔 衬底到MEMS器件层，并蚀刻第一衬底和MEMS器件层，以形成与腔体接合的MEMS器件。

    BioFET With Increased Sensing Area
    5.
    发明申请
    BioFET With Increased Sensing Area 审中-公开

    公开(公告)号：US20180313783A1

    公开(公告)日：2018-11-01

    申请号：US16021077

    申请日：2018-06-28

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Chun-Wen CHENG ,  Yi-Shao LIU ,  Fei-Lung LAI

    IPC: G01N27/414

    CPC classification number: G01N27/4145

    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure, an isolation layer, an interface layer in an opening of the isolation layer, and a metal crown structure over the interface layer. The interface layer and the metal crown structure are disposed on opposite side of the transistor from a gate structure.

    BIOFET WITH INCREASED SENSING AREA
    7.
    发明申请
    BIOFET WITH INCREASED SENSING AREA 有权

    公开(公告)号：US20210072181A1

    公开(公告)日：2021-03-11

    申请号：US17087112

    申请日：2020-11-02

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chun-Wen CHENG ,  Yi-Shao LIU ,  Fei-Lung LAI

    IPC: G01N27/414 ,  H01L23/34 ,  H01L29/66 ,  H01L29/78

    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure, an isolation layer, an interface layer in an opening of the isolation layer, and a metal crown structure over the interface layer. The interface layer and the metal crown structure are disposed on opposite side of the transistor from a gate structure.

    Backside Sensing BioFET with Enhanced Performance
    10.
    发明申请
    Backside Sensing BioFET with Enhanced Performance 审中-公开

    公开(公告)号：US20180238827A1

    公开(公告)日：2018-08-23

    申请号：US15958053

    申请日：2018-04-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chun-Wen CHENG ,  Yi-Shao Liu ,  Fei-Lung Lai ,  Wei-Cheng Lin ,  Ta-Chuan Liao ,  Chien-Kuo Yang

    IPC: G01N27/414

    CPC classification number: G01N27/4148 ,  G01N27/4145

    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.

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