公开(公告)号：US20210272818A1

公开(公告)日：2021-09-02

申请号：US17323951

申请日：2021-05-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Sheng LIN ,  Chi-Jen LIU ,  Chi-Hsiang SHEN ,  Te-Ming KUNG ,  Chun-Wei HSU ,  Chia-Wei HO ,  Yang-Chun CHENG ,  William Weilun HONG ,  Liang-Guang CHEN ,  Kei-Wei CHEN

IPC分类号： H01L21/321 ,  H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

摘要： The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

公开(公告)号：US20140367801A1

公开(公告)日：2014-12-18

申请号：US13917145

申请日：2013-06-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chi-Jen LIU ,  Li-Chieh WU ,  Shich-Chang SUEN ,  Liang-Guang CHEN

IPC分类号： H01L29/423 ,  H01L29/49

CPC分类号： H01L29/517 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02244 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28229 ,  H01L21/28518 ,  H01L21/3212 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823842 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 Å to about 40 Å. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

摘要翻译： 提供了用于形成半导体器件的机构的实施例。 半导体器件包括在半导体衬底上形成有金属栅堆叠的半导体衬底，并且金属栅叠层包括金属栅电极。 半导体器件还包括形成在金属栅叠层上并与金属栅电极直接接触的金属氧化物层，并且金属氧化物层的厚度在大约至大约的范围内。 金属氧化物层具有由金属栅电极的氧化材料制成的第一部分，并且具有由不同于第一部分的材料制成的第二部分。

公开(公告)号：US20150295063A1

公开(公告)日：2015-10-15

申请号：US14746061

申请日：2015-06-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chi-Jen LIU ,  Li-Chieh WU ,  Shich-Chang SUEN ,  Liang-Guang CHEN

IPC分类号： H01L29/51 ,  H01L21/28 ,  H01L29/40 ,  H01L21/321 ,  H01L21/02 ,  H01L21/285

CPC分类号： H01L29/517 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02244 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28229 ,  H01L21/28518 ,  H01L21/3212 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823842 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate and forming a metal gate stack including a metal gate electrode over the semiconductor substrate. The method also includes applying an oxidizing solution containing an oxidizing agent over the metal gate electrode to oxidize the metal gate electrode to form a metal oxide layer on the metal gate electrode.

摘要翻译： 提供一种形成半导体器件的方法。 该方法包括提供半导体衬底并在半导体衬底上形成包括金属栅电极的金属栅叠层。 该方法还包括在金属栅电极上施加含有氧化剂的氧化溶液以氧化金属栅电极，以在金属栅电极上形成金属氧化物层。

公开(公告)号：US20150115447A1

公开(公告)日：2015-04-30

申请号：US14061782

申请日：2013-10-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Fu-Ming HUANG ,  Han-Hsin KUO ,  Chi-Ming TSAI ,  Liang-Guang CHEN

IPC分类号： H01L23/532 ,  H01L21/306 ,  H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/321 ,  H01L21/76862 ,  H01L21/76883 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor substructure with improved performance and a method of forming the same is described. The method includes providing a semiconductor dielectric layer having a recess formed therein; forming an interconnect structure with a metal liner and a conductive fill within the recess; and applying an electron beam treatment to the substructure.

摘要翻译： 描述了具有改进性能的半导体子结构及其形成方法。 该方法包括提供其中形成有凹部的半导体电介质层; 在所述凹槽内形成具有金属衬垫和导电填料的互连结构; 并对该子结构施加电子束处理。

公开(公告)号：US20150024661A1

公开(公告)日：2015-01-22

申请号：US13944353

申请日：2013-07-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： He-Hui PENG ,  Fu-Ming HUANG ,  Shich-Chang SUEN ,  Han-Hsin KUO ,  Chi-Ming TSAI ,  Liang-Guang CHEN

IPC分类号： B24B53/017 ,  H01L21/304

CPC分类号： B24B53/017 ,  B08B3/02 ,  H01L21/304

摘要： Embodiments of mechanisms for performing a chemical mechanical polishing (CMP) process are provided. A method for performing a CMP process includes polishing a wafer by using a polishing pad. The method also includes applying a cleaning liquid jet on the polishing pad to condition the polishing pad. A CMP system is also provided.

摘要翻译： 提供了用于进行化学机械抛光（CMP）工艺的机构的实施例。 执行CMP处理的方法包括通过使用抛光垫来抛光晶片。 该方法还包括在抛光垫上施加清洗液喷射以调节抛光垫。 还提供CMP系统。

公开(公告)号：US20180166331A1

公开(公告)日：2018-06-14

申请号：US15401238

申请日：2017-01-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Wei HSU ,  Chi-Jen LIU ,  Cheng-Chun CHANG ,  Yi-Sheng LIN ,  Pinlei Edmund CHU ,  Liang-Guang CHEN

IPC分类号： H01L21/768 ,  H01L29/66 ,  H01L21/321 ,  H01L21/02

CPC分类号： H01L21/76823 ,  H01L21/02074 ,  H01L21/02244 ,  H01L21/32125 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/7684 ,  H01L21/76888 ,  H01L21/76895 ,  H01L29/66795 ,  H01L29/7851

摘要： Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a conductive material in the trench and over a top surface of the material layer and polishing the conductive material with a slurry to expose the top surface of the material layer and to form a conductive structure in the trench. The method for forming a semiconductor structure further includes forming a material layer over a substrate and forming a trench in the material layer. The method for forming a semiconductor structure further includes removing the slurry with a reducing solution. In addition, the reducing solution includes a reducing agent, and a standard electrode voltage of the conductive material is greater than a standard electrode voltage of the reducing agent.

公开(公告)号：US20150102456A1

公开(公告)日：2015-04-16

申请号：US14052687

申请日：2013-10-11

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Kuo-Min LIN ,  Wei-Lun HONG ,  Ying-Tsung CHEN ,  Liang-Guang CHEN

IPC分类号： H01L29/06 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/762

CPC分类号： H01L21/31055 ,  H01L21/02236 ,  H01L21/31053 ,  H01L21/76224

摘要： A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes a first cushion layer, a second cushion layer and an insulating filler. The first cushion layer is peripherally enclosed by the semiconductor substrate, the second cushion layer is peripherally enclosed by the first cushion layer, and insulating filler is peripherally enclosed by the second cushion layer. A method for fabricating the semiconductor device is also provided herein.

摘要翻译： 半导体器件包括半导体衬底和沟槽隔离。 沟槽隔离位于半导体衬底中，并且包括第一缓冲层，第二缓冲层和绝缘填料。 第一缓冲层由半导体衬底周边封闭，第二缓冲层由第一缓冲层周边封闭，绝缘填料由第二缓冲层周边封闭。 本文还提供了一种用于制造半导体器件的方法。