-
公开(公告)号:US20240047496A1
公开(公告)日:2024-02-08
申请号:US18488592
申请日:2023-10-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chin-Yu LIN , Keng-Ying LIAO , Su-Yu YEH , Po-Zen CHEN , Huai-Jen TUNG , Hsien-Li CHEN
IPC: H01L27/146
CPC classification number: H01L27/14629 , H01L27/14645 , H01L27/14621 , H01L27/14689 , H01L27/14636 , H01L27/1464 , H01L27/14687 , H01L27/14627
Abstract: An image sensor includes a substrate, a grid, and a color filter. The grid is over the substrate. From a cross-sectional view, the grid includes a first grid and a second grid over the first grid, the first grid has lower portion that has a first sidewall and a second sidewall opposing the first sidewall, the second grid has a third sidewall and a fourth sidewall opposing the third sidewall, and a width between the third sidewall and the fourth sidewall is less than a width between the first sidewall and the second sidewall. The color filter extends through the grid structure.
-
公开(公告)号:US20230120006A1
公开(公告)日:2023-04-20
申请号:US18066762
申请日:2022-12-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chin-Yu LIN , Keng-Ying LIAO , Su-Yu YEH , Po-Zen CHEN , Huai-Jen TUNG , Hsien-Li CHEN
IPC: H01L27/146
Abstract: A method incudes forming a plurality of photodiodes in a substrate; forming an interconnect structure on a front-side of the substrate; forming a barrier layer on a back-side of the substrate; depositing a metal layer over the barrier layer; forming an adhesion enhancement layer over the metal layer; forming an oxide layer over the adhesion enhancement layer; etching the oxide layer, the adhesion enhancement layer, the metal layer, and the barrier layer to form an oxide grid, an adhesion enhancement grid, a metal grid, and a barrier grid, respectively, wherein the barrier grid and the adhesion enhancement grid have a same chemical element.
-
公开(公告)号:US20210225918A1
公开(公告)日:2021-07-22
申请号:US16746720
申请日:2020-01-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chin-Yu LIN , Keng-Ying LIAO , Su-Yu YEH , Po-Zen CHEN , Huai-Jen TUNG , Hsien-Li CHEN
IPC: H01L27/146
Abstract: An image sensor structure includes a semiconductor device, a plurality of image sensing elements formed in the semiconductor substrate, an interconnect structure formed on the semiconductor substrate, and a composite grid structure over the semiconductor substrate. The composite grid structure includes a tungsten grid, an oxide grid over the tungsten grid, and an adhesion enhancement grid spacing the tungsten grid from the oxide grid.
-
公开(公告)号:US20200373344A1
公开(公告)日:2020-11-26
申请号:US16422271
申请日:2019-05-24
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Huai-jen TUNG , Ching-Chung SU , Keng-Ying LIAO , Po-Zen CHEN , Su-Yu YEH , S.Y. CHEN
IPC: H01L27/146 , H01L23/00
Abstract: The present disclosure describes the formation of a pad structure in an image sensor device using a sacrificial isolation region and a silicon oxide based stack with no intervening nitride etch-stop layers. The image sensor device includes a semiconductor layer comprising a first horizontal surface opposite to a second horizontal surface; a metallization layer formed on the second horizontal surface of the semiconductor layer, where the metallization layer includes a dielectric layer. The image sensor device also includes a pad region traversing through the semiconductor layer from the first horizontal surface to the second horizontal surface. The pad region includes an oxide layer with no intervening nitride layers formed on the dielectric layer of the metallization layer and a pad structure in physical contact with a conductive structure of the metallization layer.
-
公开(公告)号:US20220359598A1
公开(公告)日:2022-11-10
申请号:US17871890
申请日:2022-07-22
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chin-Yu LIN , Keng-Ying LIAO , Su-Yu YEH , Po-Zen CHEN , Huai-Jen TUNG , Hsien-Li CHEN
IPC: H01L27/146
Abstract: An image sensor structure includes a semiconductor device, a plurality of image sensing elements formed in the semiconductor substrate, an interconnect structure formed on the semiconductor substrate, and a composite grid structure over the semiconductor substrate. The composite grid structure includes a tungsten grid, an oxide grid over the tungsten grid, and an adhesion enhancement grid spacing the tungsten grid from the oxide grid.
-
公开(公告)号:US20190115222A1
公开(公告)日:2019-04-18
申请号:US16219835
申请日:2018-12-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Keng-Ying LIAO , Chung-Bin TSENG , Po-Zen CHEN , Yi-Hung CHEN , Yi-Jie CHEN
IPC: H01L21/3065 , H01L21/3213 , H01L21/311 , H01L21/308 , H01L21/28 , H01L21/033 , H01L21/027 , H01L29/66
CPC classification number: H01L21/3065 , H01L21/0276 , H01L21/0337 , H01L21/28035 , H01L21/28123 , H01L21/3081 , H01L21/3085 , H01L21/31127 , H01L21/31138 , H01L21/31144 , H01L21/32137 , H01L21/32139 , H01L29/66568 , H01L29/66575 , H01L29/78
Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.
-
公开(公告)号:US20210020669A1
公开(公告)日:2021-01-21
申请号:US16511803
申请日:2019-07-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chin-Yu LIN , Keng-Ying LIAO , Huai-Jen TUNG , Po-Zen CHEN , Su-Yu YEH , Chia-Yun CHEN , Ta-Cheng WEI
IPC: H01L27/146 , H01L21/306 , H01L21/762 , H01L21/3105 , H01L21/768 , H01L31/18
Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a metal catalyst layer on an etching area of the semiconductor substrate; performing a wet etch process to the semiconductor substrate to etch the etching area of the semiconductor substrate under the metal catalyst layer, thereby forming a trench in the semiconductor substrate; and removing the metal catalyst layer from the semiconductor substrate after performing the wet etch process.
-
公开(公告)号:US20170170024A1
公开(公告)日:2017-06-15
申请号:US15444039
申请日:2017-02-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Keng-Ying LIAO , Chung-Bin TSENG , Po-Zen CHEN , Yi-Hung CHEN , Yi-Jie CHEN
IPC: H01L21/3065 , H01L29/66 , H01L21/28 , H01L21/308 , H01L21/311
CPC classification number: H01L21/3065 , H01L21/0276 , H01L21/0337 , H01L21/28035 , H01L21/28123 , H01L21/3081 , H01L21/3085 , H01L21/31127 , H01L21/31138 , H01L21/31144 , H01L21/32137 , H01L21/32139 , H01L29/66568 , H01L29/66575 , H01L29/78
Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.
-
公开(公告)号:US20170154891A1
公开(公告)日:2017-06-01
申请号:US15134262
申请日:2016-04-20
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Keng-Ying LIAO , Po-Zen CHEN , Yi-Jie CHEN , Yi-Hung CHEN
IPC: H01L27/115 , H01L21/311 , H01L29/66 , H01L21/28
CPC classification number: H01L27/11521 , H01L21/28273 , H01L21/31116 , H01L29/6653 , H01L29/66825
Abstract: The present disclosure provides a method of fabricating a semiconductor structure, and the method includes following steps. A gate structure is formed on a substrate, and a liner layer is formed to cover the gate structure and the substrate. A spacer layer is formed on the liner layer, and an etching gas is continuously provided to remove a portion of the spacer layer while maintaining the substrate at a second pressure, which the etching gas has a first pressure. The second pressure is greater than the first pressure.
-
-
-
-
-
-
-
-