Abstract:
A Content Addressable Memory (CAM) array includes a first and a second cell structure sharing a cell boundary. The first cell structure includes a first storage circuit and a first comparator circuit, the first comparator circuit includes a first transistor having a gate, a drain, and a source. The second cell structure includes a second storage circuit and a second comparator circuit, the second comparator circuit includes a second transistor having a gate, a drain, and a source. The CAM array further includes a first shared source contact landing on the source of the first transistor and the source of the second transistor. The first shared source contact connects the source of the first transistor to the source of the second transistor. And the first shared source contact extends across the shared cell boundary from the first cell structure to the second cell structure.
Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming a metal-containing layer on a substrate, the metal-containing layer including a plurality of conjugates of metal-hydroxyl groups; treating the metal-containing layer at temperature that is lower than about 300° C. thereby causing a condensation reaction involving the plurality of conjugates of metal-hydroxyl groups; forming a patterned photosensitive layer on the treated metal-containing layer; and developing the patterned photosensitive layer so as to allow at least about 6% decrease of optimum exposure (Eop).
Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming a metal-containing layer on a substrate, the metal-containing layer including a plurality of conjugates of metal-hydroxyl groups; treating the metal-containing layer at temperature that is lower than about 300° C. thereby causing a condensation reaction involving the plurality of conjugates of metal-hydroxyl groups; forming a patterned photosensitive layer on the treated metal-containing layer; and developing the patterned photosensitive layer so as to allow at least about 6% decrease of optimum exposure (Eop).
Abstract:
Methods for performing a photolithographic process are disclosed. The methods facilitate the removal of photosensitive from a wafer after the photosensitive has been used as an etch mask. The photosensitive may be a negative tone photosensitive that undergoes a cross-linking process on exposure to electromagnetic energy. By limiting the cross-linking through a reduced post-exposure bake temperature and/or through reduced cross-linker loading, the photoresist, or at least a portion thereof, may have a reduced solvent strip resistance. Because of the reduced solvent strip resistance, a portion of the photosensitive may be removed using a solvent strip. After the solvent strip, a dry etch may be performed to remove remaining portions of the photoresist.
Abstract:
A system and method for anti-reflective layers is provided. In an embodiment the anti-reflective layer comprises a floating additive in order to form a floating additive region along a top surface of the anti-reflective layer after the anti-reflective layer has dispersed. The floating additive may comprise an additive group which will decompose along with a fluorine unit bonded to the additive group which will decompose. Additionally, adhesion between the middle layer and the photoresist may be increased by applying an adhesion promotion layer using either a deposition process or phase separation, or a cross-linking may be performed between the middle layer and the photoresist.
Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer of a polymeric material on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a silicon concentration in weight percentage less than 20% and is wet strippable; forming a patterned photosensitive layer on the silicon-containing middle layer; performing a first etching process to transfer a pattern of the patterned photosensitive layer to the silicon-containing middle layer; performing a second etching process to transfer the pattern to the under layer; and performing a wet stripping process to the silicon-containing middle layer and the under layer.
Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer of a polymeric material on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a silicon concentration in weight percentage less than 20% and is wet strippable; forming a patterned photosensitive layer on the silicon-containing middle layer; performing a first etching process to transfer a pattern of the patterned photosensitive layer to the silicon-containing middle layer; performing a second etching process to transfer the pattern to the under layer; and performing a wet stripping process to the silicon-containing middle layer and the under layer.
Abstract:
Methods of forming a semiconductor device using a photoresist additive and methods of making a photoresist composition using the photoresist additive are disclosed. The photosensitive additive includes a polymer; at least one photo-acid generator (PAG); and at least one additive compound comprising a base and an acid-labile group (ALG). The at least one additive compound undergoes intramolecular cyclization to from a cyclic amide compound in the presence of acid. The at least one additive compound also neutralizes acid generated by the PAG without consuming the acid and does not absorb much light in the exposure areas.
Abstract:
Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.
Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming a metal-containing layer on a substrate, the metal-containing layer including a plurality of conjugates of metal-hydroxyl groups; treating the metal-containing layer at temperature that is lower than about 300° C. thereby causing a condensation reaction involving the plurality of conjugates of metal-hydroxyl groups; forming a patterned photosensitive layer on the treated metal-containing layer; and developing the patterned photosensitive layer so as to allow at least about 6% decrease of optimum exposure (Eop).