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1.发明申请公开(公告)号：US20170256486A1
公开(公告)日：2017-09-07
申请号：US15601562
申请日：2017-05-22
发明人： Yung-Hsu Wu , Hai-Ching Chen , Jung-Hsun Tsai , Shau-Lin Shue , Tien-I Bao
IPC分类号： H01L23/528 , H01L23/522 , H01L23/532 , H01L21/311 , H01L21/033 , H01L21/02 , H01L21/768
CPC分类号： H01L23/528 , H01L21/02126 , H01L21/0214 , H01L21/0228 , H01L21/02282 , H01L21/02348 , H01L21/0337 , H01L21/31144 , H01L21/76802 , H01L21/76807 , H01L21/76877 , H01L21/76885 , H01L23/5226 , H01L23/532
摘要： A first conductive element is disposed. in a first dielectric layer. An etching stop layer is disposed on the first dielectric layer but not on the first conductive element. A first metal capping layer segment is disposed on the first conductive element but not on the first dielectric layer. The etching stop layer has a greater thickness than the first metal capping layer segment. A first segment of a second conductive element is disposed on the first metal capping layer segment. A second segment of the second conductive element is disposed over the first segment of the second conductive element and partially over the etching stop layer. A third conductive element is disposed over the second conductive element.
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2.发明申请公开(公告)号：US20210098362A1
公开(公告)日：2021-04-01
申请号：US17120601
申请日：2020-12-14
发明人： Yung-Hsu Wu , Hai-Ching Chen , Jung-Hsun Tsai , Shau-Lin Shue , Tien-I Bao
IPC分类号： H01L23/528 , H01L21/768 , H01L21/02 , H01L21/033 , H01L21/311 , H01L23/522 , H01L23/532
摘要： A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.
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公开(公告)号：US10163797B2
公开(公告)日：2018-12-25
申请号：US14879259
申请日：2015-10-09
发明人： Chi-Lin Teng , Jung-Hsun Tsai , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao
IPC分类号： H01L23/532 , H01L21/768 , H01L29/417 , H01L21/8234 , H01L21/283 , H01L21/31 , H01L21/311 , H01L21/3205 , H01L21/3213 , H01L23/522 , H01L23/528 , H01L29/45 , H01L29/51 , H01L29/66 , H01L23/485 , H01L29/78
摘要： A plurality of high-k metal gate (HKMG) structures is formed over a substrate. The (HKMG) structures are separated by a plurality of gaps. The HKMG structures each include a first dielectric layer at an upper surface of the HKMG structure. The gaps are filled with a first conductive material. A portion of the first conductive material is removed in each of the gaps through an etching-back process. A metal oxide layer is formed using a spin-on deposition process. The metal oxide layer is formed over the (HKMG) structures and over the first conductive material. A second dielectric layer is formed over the metal oxide layer. An opening is etched in the second dielectric layer. The opening is etched through the second dielectric layer and through the metal oxide layer. The opening is filled with a second conductive material.
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4.发明申请公开(公告)号：US20180211911A1
公开(公告)日：2018-07-26
申请号：US15924549
申请日：2018-03-19
发明人： Yung-Hsu Wu , Hai-Ching Chen , Jung-Hsun Tsai , Shau-Lin Shue , Tien-I Bao
IPC分类号： H01L23/528 , H01L21/033 , H01L21/02 , H01L23/532 , H01L21/768 , H01L23/522 , H01L21/311
CPC分类号： H01L23/528 , H01L21/02126 , H01L21/0214 , H01L21/0228 , H01L21/02282 , H01L21/02348 , H01L21/0337 , H01L21/31144 , H01L21/76802 , H01L21/76807 , H01L21/76877 , H01L21/76885 , H01L23/5226 , H01L23/532
摘要： A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.
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5.发明授权公开(公告)号：US11532552B2
公开(公告)日：2022-12-20
申请号：US17120601
申请日：2020-12-14
发明人： Yung-Hsu Wu , Hai-Ching Chen , Jung-Hsun Tsai , Shau-Lin Shue , Tien-I Bao
IPC分类号： H01L23/528 , H01L21/768 , H01L21/02 , H01L21/033 , H01L21/311 , H01L23/522 , H01L23/532
摘要： A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.
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6.发明授权公开(公告)号：US09922927B2
公开(公告)日：2018-03-20
申请号：US15601562
申请日：2017-05-22
发明人： Yung-Hsu Wu , Hai-Ching Chen , Jung-Hsun Tsai , Shau-Lin Shue , Tien-I Bao
IPC分类号： H01L23/528 , H01L21/02 , H01L21/033 , H01L21/311 , H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L23/528 , H01L21/02126 , H01L21/0214 , H01L21/0228 , H01L21/02282 , H01L21/02348 , H01L21/0337 , H01L21/31144 , H01L21/76802 , H01L21/76807 , H01L21/76877 , H01L21/76885 , H01L23/5226 , H01L23/532
摘要： A first conductive element is disposed in a first dielectric layer. An etching stop layer is disposed on the first dielectric layer but not on the first conductive element. A first metal capping layer segment is disposed on the first conductive element but not on the first dielectric layer. The etching stop layer has a greater thickness than the first metal capping layer segment. A first segment of a second conductive element is disposed on the first metal capping layer segment. A second segment of the second conductive element is disposed over the first segment of the second conductive element and partially over the etching stop layer. A third conductive element is disposed over the second conductive element.
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公开(公告)号：US20190131240A1
公开(公告)日：2019-05-02
申请号：US16232921
申请日：2018-12-26
发明人： Chi-Lin Teng , Jung-Hsun Tsai , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao
IPC分类号： H01L23/532 , H01L21/8234 , H01L29/51 , H01L21/768 , H01L29/417 , H01L29/45 , H01L23/528 , H01L29/66 , H01L23/485 , H01L21/283 , H01L21/31 , H01L21/311 , H01L21/3205 , H01L21/3213 , H01L23/522
摘要： A plurality of high-k metal gate (HKMG) structures is formed over a substrate. The (HKMG) structures are separated by a plurality of gaps. The HKMG structures each include a first dielectric layer at an upper surface of the HKMG structure. The gaps are filled with a first conductive material. A portion of the first conductive material is removed in each of the gaps through an etching-back process. A metal oxide layer is formed using a spin-on deposition process. The metal oxide layer is formed over the (HKMG) structures and over the first conductive material. A second dielectric layer is formed over the metal oxide layer. An opening is etched in the second dielectric layer. The opening is etched through the second dielectric layer and through the metal oxide layer. The opening is filled with a second conductive material.
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公开(公告)号：US20180076132A1
公开(公告)日：2018-03-15
申请号：US15810337
申请日：2017-11-13
发明人： Jung-Hsun Tsai , Chi-Lin Teng , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao , Chien-Hua Huang
IPC分类号： H01L23/522 , H01L21/02 , H01L21/311 , H01L21/768 , H01L23/528 , H01L23/532
CPC分类号： H01L23/5226 , H01L21/0206 , H01L21/02071 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/0228 , H01L21/31111 , H01L21/31144 , H01L21/76807 , H01L21/76811 , H01L21/76832 , H01L21/76834 , H01L21/7684 , H01L21/76877 , H01L21/76897 , H01L23/528 , H01L23/53228 , H01L23/53238 , H01L23/53295
摘要： The present disclosure provides a method that includes providing a substrate having a first dielectric material layer and first conductive features that are laterally separated from each other by segments of the first dielectric material layer; depositing a first etch stop layer on the first dielectric material layer and the first conductive features, thereby forming the first etch stop layer having oxygen-rich portions self-aligned with the segments of the first dielectric material layer and oxygen-poor portions self-aligned with the first conductive features; performing a selective removal process to selectively remove the oxygen-poor portions of the first etch stop layer; forming a second etch stop layer on the first conductive features and the oxygen-rich portions of the first etch stop layer; forming a second dielectric material layer on the second etch stop layer; and forming a conductive structure in the second dielectric material layer.
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公开(公告)号：US09818690B2
公开(公告)日：2017-11-14
申请号：US14928916
申请日：2015-10-30
发明人： Jung-Hsun Tsai , Chi-Lin Teng , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao , Chien-Hua Huang
IPC分类号： H01L21/4763 , H01L23/522 , H01L21/02 , H01L23/532 , H01L23/528 , H01L21/768 , H01L21/311
CPC分类号： H01L23/5226 , H01L21/0206 , H01L21/02071 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/0228 , H01L21/31111 , H01L21/31144 , H01L21/76807 , H01L21/76834 , H01L21/7684 , H01L21/76877 , H01L21/76897 , H01L23/528 , H01L23/53228 , H01L23/53238 , H01L23/53295
摘要： The present disclosure provides a method that includes providing a substrate having a first dielectric material layer and first conductive features that are laterally separated from each other by segments of the first dielectric material layer; depositing a first etch stop layer on the first dielectric material layer and the first conductive features, thereby forming the first etch stop layer having oxygen-rich portions self-aligned with the segments of the first dielectric material layer and oxygen-poor portions self-aligned with the first conductive features; performing a selective removal process to selectively remove the oxygen-poor portions of the first etch stop layer; forming a second etch stop layer on the first conductive features and the oxygen-rich portions of the first etch stop layer; forming a second dielectric material layer on the second etch stop layer; and forming a conductive structure in the second dielectric material layer.
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公开(公告)号：US11049811B2
公开(公告)日：2021-06-29
申请号：US16232921
申请日：2018-12-26
发明人： Chi-Lin Teng , Jung-Hsun Tsai , Kai-Fang Cheng , Hsin-Yen Huang , Hai-Ching Chen , Tien-I Bao
IPC分类号： H01L23/532 , H01L29/417 , H01L21/768 , H01L21/8234 , H01L23/485 , H01L29/51 , H01L29/66 , H01L21/283 , H01L21/31 , H01L21/311 , H01L21/3205 , H01L21/3213 , H01L23/522 , H01L23/528 , H01L29/45 , H01L29/78
摘要： A plurality of high-k metal gate (HKMG) structures is formed over a substrate. The (HKMG) structures are separated by a plurality of gaps. The HKMG structures each include a first dielectric layer at an upper surface of the HKMG structure. The gaps are filled with a first conductive material. A portion of the first conductive material is removed in each of the gaps through an etching-back process. A metal oxide layer is formed using a spin-on deposition process. The metal oxide layer is formed over the (HKMG) structures and over the first conductive material. A second dielectric layer is formed over the metal oxide layer. An opening is etched in the second dielectric layer. The opening is etched through the second dielectric layer and through the metal oxide layer. The opening is filled with a second conductive material.
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