公开(公告)号：US11532552B2

公开(公告)日：2022-12-20

申请号：US17120601

申请日：2020-12-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yung-Hsu Wu ,  Hai-Ching Chen ,  Jung-Hsun Tsai ,  Shau-Lin Shue ,  Tien-I Bao

IPC分类号： H01L23/528 ,  H01L21/768 ,  H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L23/522 ,  H01L23/532

摘要： A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.

公开(公告)号：US20190252249A1

公开(公告)日：2019-08-15

申请号：US16390715

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yung-Hsu Wu ,  Chien-Hua Huang ,  Chung-Ju Lee ,  Tien-I Bao ,  Shau-Lin Shue

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L23/522

摘要： A method embodiment includes forming a hard mask over a dielectric layer and forming a first metal line and a second metal line extending through the hard mask into the dielectric layer. The method further includes removing the hard mask, wherein removing the hard mask defines an opening between the first metal line and the second metal line. A liner is then formed over the first metal line, the second metal line, and the dielectric layer, wherein the liner covers sidewalls and a bottom surface of the opening.

公开(公告)号：US10163654B2

公开(公告)日：2018-12-25

申请号：US15237898

申请日：2016-08-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yung-Sung Yen ,  Chung-Ju Lee ,  Chun-Kuang Chen ,  Chia-Tien Wu ,  Ta-Ching Yu ,  Kuei-Shun Chen ,  Ru-Gun Liu ,  Shau-Lin Shue ,  Tsai-Sheng Gau ,  Yung-Hsu Wu

IPC分类号： H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/033 ,  H01L21/8238 ,  H01L21/8234

摘要： A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.

公开(公告)号：US09922927B2

公开(公告)日：2018-03-20

申请号：US15601562

申请日：2017-05-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yung-Hsu Wu ,  Hai-Ching Chen ,  Jung-Hsun Tsai ,  Shau-Lin Shue ,  Tien-I Bao

IPC分类号： H01L23/528 ,  H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L23/528 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/0228 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/532

摘要： A first conductive element is disposed in a first dielectric layer. An etching stop layer is disposed on the first dielectric layer but not on the first conductive element. A first metal capping layer segment is disposed on the first conductive element but not on the first dielectric layer. The etching stop layer has a greater thickness than the first metal capping layer segment. A first segment of a second conductive element is disposed on the first metal capping layer segment. A second segment of the second conductive element is disposed over the first segment of the second conductive element and partially over the etching stop layer. A third conductive element is disposed over the second conductive element.

公开(公告)号：US09735052B2

公开(公告)日：2017-08-15

申请号：US14880379

申请日：2015-10-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsiung Tsai ,  Carlos H. Diaz ,  Chung-Ju Lee ,  Shau-Lin Shue ,  Tien-I Bao ,  Yung-Hsu Wu ,  Hsin-Ping Chen

IPC分类号： H01L27/108 ,  H01L23/52 ,  H01L21/768

CPC分类号： H01L21/76883 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76885

摘要： A method for fabricating a semiconductor device includes forming a dielectric layer over a substrate, forming an etch-stop-layer (ESL) over the dielectric layer, forming a first patterned hard mask (HM) defining a first trench over the ESL, forming a second trench extending through the ESL and the dielectric layer. The second trench is adjacent the first trench. The method also includes filling in the first trench and the second trench with a first material layer, extending the first trench through the ESL and the dielectric layer while the first material layer is filled in the second trench to form an extended first trench, forming a first metal line within the extended first trench, forming a capping layer over the first metal line and removing a portion of the first metal line to form a first cut by using the ESL and the first material layer as an etch mask.

公开(公告)号：US20170103915A1

公开(公告)日：2017-04-13

申请号：US14880379

申请日：2015-10-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsiung Tsai ,  Carlos H. Diaz ,  Chung-Ju Lee ,  Shau-Lin Shue ,  Tien-I Bao ,  Yung-Hsu Wu ,  Hsin-Ping Chen

IPC分类号： H01L21/768

CPC分类号： H01L21/76883 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76885

摘要： A method for fabricating a semiconductor device includes forming a dielectric layer over a substrate, forming an etch-stop-layer (ESL) over the dielectric layer, forming a first patterned hard mask (HM) defining a first trench over the ESL, forming a second trench extending through the ESL and the dielectric layer. The second trench is adjacent the first trench. The method also includes filling in the first trench and the second trench with a first material layer, extending the first trench through the ESL and the dielectric layer while the first material layer is filled in the second trench to form an extended first trench, forming a first metal line within the extended first trench, forming a capping layer over the first metal line and removing a portion of the first metal line to form a first cut by using the ESL and the first material layer as an etch mask.

公开(公告)号：US20170084460A1

公开(公告)日：2017-03-23

申请号：US15368966

申请日：2016-12-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tsung-Min Huang ,  Chung-Ju Lee ,  Yung-Hsu Wu

IPC分类号： H01L21/033 ,  H01L21/768

CPC分类号： H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method includes forming a mandrel layer over a target layer, and etching the mandrel layer to form mandrels. The mandrels have top widths greater than respective bottom widths, and the mandrels define a first opening in the mandrel layer. The first opening has an I-shape and includes two parallel portions and a connecting portion interconnecting the two parallel portions. Spacers are formed on sidewalls of the first opening. The spacers fill the connecting portion, wherein a center portion of each of the two parallel portions is unfilled by the spacers. Portions of the first opening that are unfilled by the spacers are extended into the target layer.

公开(公告)号：US09514979B2

公开(公告)日：2016-12-06

申请号：US14840162

申请日：2015-08-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tsung-Min Huang ,  Chung-Ju Lee ,  Yung-Hsu Wu

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L21/033 ,  H01L21/311 ,  H01L21/32 ,  H01L21/321 ,  H01L21/3105 ,  H01L23/532

CPC分类号： H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method includes forming a mandrel layer over a target layer, and etching the mandrel layer to form mandrels. The mandrels have top widths greater than respective bottom widths, and the mandrels define a first opening in the mandrel layer. The first opening has an I-shape and includes two parallel portions and a connecting portion interconnecting the two parallel portions. Spacers are formed on sidewalls of the first opening. The spacers fill the connecting portion, wherein a center portion of each of the two parallel portions is unfilled by the spacers. Portions of the first opening that are unfilled by the spacers are extended into the target layer.

公开(公告)号：US09490136B1

公开(公告)日：2016-11-08

申请号：US14840199

申请日：2015-08-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng Chang ,  Chia-Tien Wu ,  Yung-Hsu Wu

IPC分类号： H01L21/308

CPC分类号： H01L21/0337

摘要： A method includes forming a hard mask (HM) stack over a material layer, which has a first, second, third and fourth HM layers. The method also includes forming a first trench in the fourth HM layer, forming a first spacer in the first trench, forming a second trench in the fourth HM layer, removing at least a portion of the first spacer to form a cut by using the third HM layer as an etch-stop layer, removing a portion of the third HM layer and the second HM layer exposed by the first trench, second trench, and cut to form an extended first trench, extended second trench, and extended cut, respectively. The method also includes forming second spacers in the extended first trench, the extended second trench, and the extended cut and removing another portion of the second HM layer to form a third trench.

摘要翻译： 一种方法包括在具有第一，第二，第三和第四HM层的材料层上形成硬掩模（HM）堆叠。 该方法还包括在第四HM层中形成第一沟槽，在第一沟槽中形成第一间隔物，在第四HM层中形成第二沟槽，通过使用第三HM层去除第一间隔物的至少一部分以形成切口 HM层作为蚀刻停止层，去除由第一沟槽，第二沟槽和切口暴露的第三HM层的一部分和第二HM层，以分别形成延伸的第一沟槽，延伸的第二沟槽和延伸的切口。 该方法还包括在延伸的第一沟槽，延伸的第二沟槽和延伸的切口中形成第二间隔物，并且移除第二HM层的另一部分以形成第三沟槽。

公开(公告)号：US09123776B2

公开(公告)日：2015-09-01

申请号：US14096963

申请日：2013-12-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsiung Tsai ,  Yung-Hsu Wu ,  Tsung-Min Huang ,  Chung-Ju Lee ,  Tien-I Bao ,  Shau-Lin Shue

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/033

CPC分类号： H01L21/76877 ,  H01L21/0273 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3085 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76816

摘要： Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including forming a first hard mask layer over a semiconductor device layer, forming a set of mandrels over the first hard mask layer, and forming a first spacer layer over the set of mandrels and the first hard mask layer. The method further includes forming a second spacer layer over the first spacer layer, patterning the first spacer layer and the second spacer layer to form a mask pattern, and patterning the first hard mask layer using the mask pattern as a mask.

摘要翻译： 本公开的实施例是形成半导体器件的方法和图形化半导体器件的方法。 一个实施例是一种形成半导体器件的方法，该方法包括在半导体器件层上形成第一硬掩模层，在第一硬掩模层上形成一组心轴，以及在所述心轴组之上形成第一间隔层，以及 第一个硬掩模层。 该方法还包括在第一间隔层上形成第二间隔层，图案化第一间隔层和第二间隔层以形成掩模图案，并使用掩模图案作为掩模对第一硬掩模层进行构图。