公开(公告)号：US20200149886A1

公开(公告)日：2020-05-14

申请号：US16740897

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Lin Wang ,  Jung-Tang Wu ,  Chin-Szu Lee ,  Hua-Sheng Chiu

IPC: G01C9/06 ,  H01L21/67 ,  G08B21/18 ,  G01H1/00 ,  H01L21/677

Abstract: A leveling sensor, a load port including a leveling sensor, and a method of leveling a load port using a load port are disclosed. In an embodiment, a sensor includes an accelerometer configured to detect leveling and vibration of a load port and produce a plurality of data; a plurality of indicator lights configured to display a level measurement and a level direction based on the leveling of the load port; a processor configured to process the data produced by the accelerometer; and a wired connection configured to connect the processor to an external device.

公开(公告)号：US10533852B1

公开(公告)日：2020-01-14

申请号：US16275994

申请日：2019-02-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Lin Wang ,  Jung-Tang Wu ,  Chin-Szu Lee ,  Hua-Sheng Chiu

IPC: G01C9/06 ,  H01L21/67 ,  H01L21/677 ,  G01H1/00 ,  G08B21/18

Abstract: A leveling sensor, a load port including a leveling sensor, and a method of leveling a load port using a load port are disclosed. In an embodiment, a sensor includes an accelerometer configured to detect leveling and vibration of a load port and produce a plurality of data; a plurality of indicator lights configured to display a level measurement and a level direction based on the leveling of the load port; a processor configured to process the data produced by the accelerometer; and a wired connection configured to connect the processor to an external device.

公开(公告)号：US12112930B2

公开(公告)日：2024-10-08

申请号：US16528781

申请日：2019-08-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Yi-Lin Wang

IPC: H01J37/34 ,  C23C14/16 ,  C23C14/34 ,  H01J37/32 ,  H01L21/285 ,  H10N50/01

CPC classification number: H01J37/3476 ,  C23C14/165 ,  C23C14/34 ,  C23C14/3457 ,  H01J37/3244 ,  H01J37/3426 ,  H01L21/2855 ,  H10N50/01 ,  H01J2237/327

Abstract: A method includes placing a wafer on a wafer holder, depositing a film on a front surface of the wafer, and blowing a gas through ports in a redistributor onto a back surface of the wafer at a same time the deposition is performed. The gas is selected from a group consisting of nitrogen (N2), He, Ne, and combinations thereof.

公开(公告)号：US20230380291A1

公开(公告)日：2023-11-23

申请号：US18230358

申请日：2023-08-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yu-Jen CHIEN ,  Jung-Tang Wu ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Meng-Yu Wu

IPC: H10N50/01 ,  H10B61/00 ,  H10N50/80

CPC classification number: H10N50/01 ,  H10B61/22 ,  H10N50/80

Abstract: A method of manufacturing a semiconductor device includes: forming a substrate over the substrate, the substrate defining a logic region and a memory region; depositing a bottom electrode layer across the logic region and the memory region; depositing a magnetic tunnel junction (MTJ) layer over the bottom electrode layer; depositing a first conductive layer over the MTJ layer; depositing a sacrificial layer over the first conductive layer; etching the sacrificial layer in the memory region to expose the first conductive layer in the memory region while keeping the first conductive layer in the logic region covered; depositing a second conductive layer in the memory region and the logic region; patterning the second conductive layer to expose the MTJ layer in the memory region; and etching the patterned second conductive layer and the MTJ layer to form a top electrode and an MTJ, respectively, in the memory region.

公开(公告)号：US11031236B2

公开(公告)日：2021-06-08

申请号：US16589392

申请日：2019-10-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Yu-Jen Chien ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Yao-Shien Huang

IPC: H01L21/02 ,  H01L21/28 ,  H01L43/12 ,  H01L27/22 ,  H01L21/04

Abstract: A method of forming a semiconductor structure includes forming a first top electrode (TE) layer over a magnetic tunnel junction (MTJ) layer and performing a smoothing treatment on the first TE layer. The smoothing treatment is performed in situ after the forming first TE layer. The smoothing treatment removes spike point defects from the first TE layer. Additional TE layers may be formed over the first TE layer.

公开(公告)号：US11107980B2

公开(公告)日：2021-08-31

申请号：US16559207

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Wu Meng Yu ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Han-Ting Tsai ,  Yu-Jen Chien

IPC: H01L43/12 ,  H01L27/22 ,  H01F10/32 ,  H01F41/34 ,  G11C11/16 ,  H01L43/02

Abstract: A top electrode of a magnetoresistive random access memory (MRAM) device over a magnetic tunnel junction (MTJ) is formed using a film of titanium nitride oriented in a (111) crystal structure rather than a top electrode which uses tantalum, tantalum nitride, and/or a multilayer including tantalum and tantalum nitride.

公开(公告)号：US10991876B2

公开(公告)日：2021-04-27

申请号：US16177030

申请日：2018-10-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Wu Meng Yu ,  Szu-Hua Wu ,  Chin-Szu Lee

IPC: H01L43/12 ,  H01L21/02 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: Methods of forming magnetic tunnel junction (MTJ) memory cells used in a magneto-resistive random access memory (MRAM) array are provided. A pre-clean process is performed to remove a metal oxide layer that may form on the top surface of the bottom electrodes of MTJ memory cells during the time the bottom electrode can be exposed to air prior to depositing MTJ layers. The pre-clean processes may include a remote plasma process wherein the metal oxide reacts with hydrogen radicals generated in the remote plasma.

公开(公告)号：US20200075299A1

公开(公告)日：2020-03-05

申请号：US16528781

申请日：2019-08-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Yi-Lin Wang

IPC: H01J37/34 ,  H01L43/12 ,  H01L21/285 ,  C23C14/34

Abstract: A method includes placing a wafer on a wafer holder, depositing a film on a front surface of the wafer, and blowing a gas through ports in a redistributor onto a back surface of the wafer at a same time the deposition is performed. The gas is selected from a group consisting of nitrogen (N2), He, Ne, and combinations thereof.

公开(公告)号：US11022437B2

公开(公告)日：2021-06-01

申请号：US16740897

申请日：2020-01-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Lin Wang ,  Jung-Tang Wu ,  Chin-Szu Lee ,  Hua-Sheng Chiu

IPC: G01C9/06 ,  H01L21/67 ,  H01L21/677 ,  G08B21/18 ,  G01H1/00

Abstract: A leveling sensor, a load port including a leveling sensor, and a method of leveling a load port using a load port are disclosed. In an embodiment, a sensor includes an accelerometer configured to detect leveling and vibration of a load port and produce a plurality of data; a plurality of indicator lights configured to display a level measurement and a level direction based on the leveling of the load port; a processor configured to process the data produced by the accelerometer; and a wired connection configured to connect the processor to an external device.

公开(公告)号：US20210098248A1

公开(公告)日：2021-04-01

申请号：US16589392

申请日：2019-10-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jung-Tang Wu ,  Yu-Jen Chien ,  Szu-Hua Wu ,  Chin-Szu Lee ,  Yao-Shien Huang

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/04 ,  H01L27/22 ,  H01L43/12

Abstract: A method of forming a semiconductor structure includes forming a first top electrode (TE) layer over a magnetic tunnel junction (MTJ) layer and performing a smoothing treatment on the first TE layer. The smoothing treatment is performed in situ after the forming first TE layer. The smoothing treatment removes spike point defects from the first TE layer. Additional TE layers may be formed over the first TE layer.