公开(公告)号：US20130062758A1

公开(公告)日：2013-03-14

申请号：US13422424

申请日：2012-03-16

申请人： Takashi IMOTO ,  Yoriyasu Ando ,  Akira Tanimoto ,  Masaji Iwamoto ,  Yasuo Takemoto ,  Hideo Taguchi ,  Naoto Takebe ,  Koichi Miyashita ,  Jun Tanaka ,  Katsuhiro Ishida ,  Shogo Watanabe ,  Yuichi Sano

发明人： Takashi IMOTO ,  Yoriyasu Ando ,  Akira Tanimoto ,  Masaji Iwamoto ,  Yasuo Takemoto ,  Hideo Taguchi ,  Naoto Takebe ,  Koichi Miyashita ,  Jun Tanaka ,  Katsuhiro Ishida ,  Shogo Watanabe ,  Yuichi Sano

IPC分类号： H01L25/07 ,  H01L23/48

CPC分类号： H01L23/3135 ,  H01L23/145 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/92247 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/32145 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device has a substrate, a first semiconductor chip, an electrode, a first and second connection member, and a first and second sealing member. The electrode is disposed on the first semiconductor chip and contains Al. The first connection member electrically connects the electrode and the substrate and contains Au or Cu. The first sealing member seals the first semiconductor chip and the first connection member. One or more second semiconductor chips are stacked on the first sealing member. The second sealing member seals the first connection member, the one or more second semiconductor chips, and the one or more second connection members. A ratio of a total weight W1 of Cl ions and Br ions in the first sealing member to a weight W0 of resins of the substrate and the first sealing member is 7.5 ppm or lower.

摘要翻译： 在一个实施例中，半导体器件具有衬底，第一半导体芯片，电极，第一和第二连接构件以及第一和第二密封构件。 电极设置在第一半导体芯片上并且包含Al。 第一连接构件电连接电极和衬底并且包含Au或Cu。 第一密封构件密封第一半导体芯片和第一连接构件。 一个或多个第二半导体芯片堆叠在第一密封构件上。 第二密封构件密封第一连接构件，一个或多个第二半导体芯片和一个或多个第二连接构件。 第一密封部件中的Cl离子和Br离子的总重量W1与基板和第一密封部件的树脂的重量W0的比例为7.5ppm以下。

公开(公告)号：US20120248628A1

公开(公告)日：2012-10-04

申请号：US13233321

申请日：2011-09-15

申请人： Jun TANAKA ,  Koichi Miyashita ,  Yoriyasu Ando ,  Akira Tanimoto ,  Yasuo Takemoto

发明人： Jun TANAKA ,  Koichi Miyashita ,  Yoriyasu Ando ,  Akira Tanimoto ,  Yasuo Takemoto

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/3135 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： According to one embodiment, a semiconductor device includes a control element provided above a main surface of a substrate through a first adhesion layer, a second adhesion layer provided to cover the control element a first semiconductor chip provided on the second adhesion layer, a bottom surface area of the first semiconductor chip being larger than a top surface area of the control element, and at least one side of an outer edge of the control element projecting to an outside of an outer edge of the first semiconductor chip.

摘要翻译： 根据一个实施例，半导体器件包括通过第一粘合层设置在基板的主表面之上的控制元件，设置成覆盖控制元件的第二粘合层，设置在第二粘合层上的第一半导体芯片， 所述第一半导体芯片的面积大于所述控制元件的顶表面积，并且所述控制元件的外边缘的至少一侧突出到所述第一半导体芯片的外边缘的外侧。

公开(公告)号：US20110110053A1

公开(公告)日：2011-05-12

申请号：US13009947

申请日：2011-01-20

申请人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

发明人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

IPC分类号： H05K1/18

CPC分类号： H01L27/105 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/11517 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor memory device is provided with a wiring board which includes an element mounting portion and connection pads. Plural semiconductor memory elements are stacked on the element mounting portion of the wiring board. The semiconductor memory element of a lower side has a thickness greater than that of the semiconductor memory element of an upper side. The semiconductor memory elements are electrically connected to the connection pads of the wiring board via metal wires.

摘要翻译： 半导体存储器件设置有包括元件安装部分和连接焊盘的布线板。 多个半导体存储元件堆叠在布线板的元件安装部分上。 下侧的半导体存储元件的厚度大于上侧的半导体存储元件的厚度。 半导体存储元件通过金属线电连接到布线板的连接焊盘。

公开(公告)号：US07898813B2

公开(公告)日：2011-03-01

申请号：US11767801

申请日：2007-06-25

申请人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

发明人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

IPC分类号： H05K1/14

CPC分类号： H01L27/105 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/11517 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor memory device is provided with a wiring board which includes an element mounting portion and connection pads. Plural semiconductor memory elements are stacked on the element mounting portion of the wiring board. The semiconductor memory element of a lower side has a thickness greater than that of the semiconductor memory element of an upper side. The semiconductor memory elements are electrically connected to the connection pads of the wiring board via metal wires.

摘要翻译： 半导体存储器件设置有包括元件安装部分和连接焊盘的布线板。 多个半导体存储元件堆叠在布线板的元件安装部分上。 下侧的半导体存储元件的厚度大于上侧的半导体存储元件的厚度。 半导体存储元件通过金属线电连接到布线板的连接焊盘。

公开(公告)号：US08064206B2

公开(公告)日：2011-11-22

申请号：US13009947

申请日：2011-01-20

申请人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

发明人： Taku Nishiyama ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

IPC分类号： H05K1/14

CPC分类号： H01L27/105 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/11517 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor memory device is provided with a wiring board which includes an element mounting portion and connection pads. Plural semiconductor memory elements are stacked on the element mounting portion of the wiring board. The semiconductor memory element of a lower side has a thickness greater than that of the semiconductor memory element of an upper side. The semiconductor memory elements are electrically connected to the connection pads of the wiring board via metal wires.

公开(公告)号：US20080316696A1

公开(公告)日：2008-12-25

申请号：US11767801

申请日：2007-06-25

申请人： Taku NISHIYAMA ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

发明人： Taku NISHIYAMA ,  Kiyokazu Okada ,  Yoriyasu Ando ,  Tetsuya Yamamoto ,  Naohisa Okumura

IPC分类号： H05K7/02

CPC分类号： H01L27/105 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/11517 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor memory device is provided with a wiring board which includes an element mounting portion and connection pads. Plural semiconductor memory elements are stacked on the element mounting portion of the wiring board. The semiconductor memory element of a lower side has a thickness greater than that of the semiconductor memory element of an upper side. The semiconductor memory elements are electrically connected to the connection pads of the wiring board via metal wires.

摘要翻译： 半导体存储器件设置有包括元件安装部分和连接焊盘的布线板。 多个半导体存储元件堆叠在布线板的元件安装部分上。 下侧的半导体存储元件的厚度大于上侧的半导体存储元件的厚度。 半导体存储元件通过金属线电连接到布线板的连接焊盘。