公开(公告)号：US07480150B2

公开(公告)日：2009-01-20

申请号：US11615495

申请日：2006-12-22

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/18

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.

Abstract translation: 在印刷电路板10中，上电极连接部52从上下方向贯通电容器部40，使上电极连接部第一部52a与电容部40不接触，通过上电极连接 部分第三部分52c设置在电容器部分40的上部，然后从上电极连接部分52b连接到上电极42.此外，下电极连接部分51穿过电容器部分40顶部到 使其不与电容器部40的上部电极42接触而与下部电极41接触。因此，上部电极连接部52和下部电极连接部51即使在 在积聚过程中，整个表面被具有高介电层结构的高介电电容器片覆盖 夹在两个金属箔之间，然后用作电容器部分40。

公开(公告)号：US08563420B2

公开(公告)日：2013-10-22

申请号：US13561247

申请日：2012-07-30

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01L21/4763

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A method for manufacturing a printed wiring board includes forming an uncalcined layer containing a raw ceramic material on a first metal layer, firing the uncalcined layer formed on the first metal layer such that a high dielectric constant layer having a ceramic body calcined in a sheet form is formed on the first metal layer, forming a second metal layer on the high dielectric constant layer on the opposite side of the high dielectric constant layer with respect to the first metal layer such that a layered capacitor having the high dielectric constant layer and first and second layer electrodes sandwiching the high dielectric constant layer is formed, and disposing the layered capacitor in a main body.

Abstract translation: 一种制造印刷电路板的方法包括在第一金属层上形成含有原料陶瓷材料的未煅烧层，焙烧形成在第一金属层上的未煅烧层，使得具有以片状形式煅烧的陶瓷体的高介电常数层 形成在第一金属层上，相对于第一金属层在高介电常数层的相对侧的高介电常数层上形成第二金属层，使得具有高介电常数层的层状电容器和第一金属层 形成夹着高介电常数层的第二层电极，并将层叠电容器配置在主体中。

公开(公告)号：US07982139B2

公开(公告)日：2011-07-19

申请号：US11356350

申请日：2006-02-17

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A multilayer printed wiring board 10 includes: a mounting portion 60 on the top surface of which is mounted a semiconductor element that is electrically connected to a wiring pattern 32, etc.; and a capacitor portion 40 having a high dielectric constant layer 43, formed of ceramic and first and second layer electrodes 41 and 42 that sandwich the high dielectric constant layer 43. One of either of the first and second layer electrodes 41 and 42 is connected to a power supply line of the semiconductor element and the other of either of the first and second layer electrodes 41 and 42 is connected to a ground line. In this multilayer printed wiring board 10, high dielectric constant layer 43 included in the layered capacitor portion 40, which is connected between the power supply line and the ground line, is formed of ceramic. With this structure, the static capacitance of the layered capacitor portion 40 can be high, and an adequate decoupling effect is exhibited even under circumstances in which instantaneous potential drops occur readily.

Abstract translation: 多层印刷电路板10包括：安装部分60，其顶表面上安装有电连接到布线图案32的半导体元件; 以及具有由陶瓷形成的高介电常数层43的电容器部分40和夹在高介电常数层43上的第一和第二层电极41和42。第一和第二层电极41和42中的一个连接到 半导体元件的电源线和第一和第二层电极41和42中的另一个连接到接地线。 在这种多层印刷电路板10中，连接在电源线和接地线之间的层状电容器部分40中包括的高介电常数层43由陶瓷形成。 利用这种结构，层状电容器部分40的静态电容可以很高，并且即使在容易发生瞬时电位下降的情况下也可以发挥足够的去耦效应。

公开(公告)号：US20070105278A1

公开(公告)日：2007-05-10

申请号：US11615495

申请日：2006-12-22

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01L21/00 ,  H01L23/02

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.

Abstract translation: 在印刷布线板10中，上部电极连接部52从上下方向贯穿电容器部40，使上部电极连接部第一部分52a不与电容器部40接触，通过上部电极 连接部分第三部分52c设置在电容器部分40的上部，然后从上电极连接部分第二部分52b连接到上电极42。 此外，下电极连接部51从上下方向贯通电容器部40，使其不与电容器部40的上部电极42接触，而与下部电极41接触。 因此，上部电极连接部52和下部电极连接部51即使在积聚的过程中也可以形成，整个表面被高介电电容器片覆盖，该介电电容片具有将介电层夹在高介电层之间的结构 两个金属箔，然后用作电容器部分40。

公开(公告)号：US08253030B2

公开(公告)日：2012-08-28

申请号：US12948894

申请日：2010-11-18

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/11

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A printed wiring board includes a main body having a mounting portion and ground and power supply pads in the mounting portion such that a ground line of a semiconductor device is connected to a ground pad and a power supply line of the device is connected to a power supply pad, and a layered capacitor disposed in the main body and having a high dielectric constant layer and first and second layer electrodes sandwiching the dielectric layer. One of the electrodes is connected to the power supply line and the other electrode is connected to the ground line, the first electrode has a solid pattern including passage holes through which second rod terminals connected to the second electrode pass in a non-contacting manner, and the second electrode has a solid pattern including passage holes through which first rod terminals connected to the first electrode pass in a non-contacting manner.

Abstract translation: 一种印刷电路板，包括具有安装部分的主体和安装部分中的接地和电源焊盘，使得半导体器件的接地线连接到接地焊盘，并且该设备的电源线连接到电源 供电焊盘和设置在主体中并具有高介电常数层的层状电容器和夹着介电层的第一和第二层电极。 电极中的一个连接到电源线，另一个电极连接到接地线，第一电极具有固体图案，其包括通孔，第二电极与第二电极连接，第二电极以非接触的方式通过， 并且第二电极具有固体图案，其包括通孔，通过该通孔与第一电极连接的第一杆端子以非接触方式通过。

公开(公告)号：US08124882B2

公开(公告)日：2012-02-28

申请号：US12419007

申请日：2009-04-06

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A multilayer printed wiring board 10 includes: a mounting portion 60 on the top surface of which is mounted a semiconductor element that is electrically connected to a wiring pattern 32, etc.; and a capacitor portion 40 having a high dielectric constant layer 43, formed of ceramic and first and second layer electrodes 41 and 42 that sandwich the high dielectric constant layer 43. One of either of the first and second layer electrodes 41 and 42 is connected to a power supply line of the semiconductor element and the other of either of the first and second layer electrodes 41 and 42 is connected to a ground line. In this multilayer printed wiring board 10, high dielectric constant layer 43 included in the layered capacitor portion 40, which is connected between the power supply line and the ground line, is formed of ceramic. With this structure, the static capacitance of the layered capacitor portion 40 can be high, and an adequate decoupling effect is exhibited even under circumstances in which instantaneous potential drops occur readily.

Abstract translation: 多层印刷电路板10包括：安装部分60，其顶表面上安装有电连接到布线图案32的半导体元件; 以及具有由陶瓷形成的高介电常数层43的电容器部分40和夹在高介电常数层43上的第一和第二层电极41和42。第一和第二层电极41和42中的一个连接到 半导体元件的电源线和第一和第二层电极41和42中的另一个连接到接地线。 在这种多层印刷电路板10中，连接在电源线和接地线之间的层状电容器部分40中包括的高介电常数层43由陶瓷形成。 利用这种结构，层状电容器部分40的静态电容可以很高，并且即使在容易发生瞬时电位下降的情况下也可以发挥足够的去耦效应。

公开(公告)号：US20060137905A1

公开(公告)日：2006-06-29

申请号：US11356350

申请日：2006-02-17

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/03

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A multilayer printed wiring board 10 includes: a mounting portion 60 on the top surface of which is mounted a semiconductor element that is electrically connected to a wiring pattern 32, etc.; and a capacitor portion 40 having a high dielectric constant layer 43, formed of ceramic and first and second layer electrodes 41 and 42 that sandwich the high dielectric constant layer 43. One of either of the first and second layer electrodes 41 and 42 is connected to a power supply line of the semiconductor element and the other of either of the first and second layer electrodes 41 and 42 is connected to a ground line. In this multilayer printed wiring board 10, high dielectric constant layer 43 included in the layered capacitor portion 40, which is connected between the power supply line and the ground line, is formed of ceramic. With this structure, the static capacitance of the layered capacitor portion 40 can be high, and an adequate decoupling effect is exhibited even under circumstances in which instantaneous potential drops occur readily.

Abstract translation: 多层印刷电路板10包括：安装部分60，其顶表面上安装有电连接到布线图案32的半导体元件; 以及具有由陶瓷形成的高介电常数层43的电容器部分40和夹在高介电常数层43上的第一和第二层电极41和42。第一和第二层电极41和42中的一个连接到 半导体元件的电源线和第一和第二层电极41和42中的另一个连接到接地线。 在这种多层印刷电路板10中，连接在电源线和接地线之间的层状电容器部分40中包括的高介电常数层43由陶瓷形成。 利用这种结构，层状电容器部分40的静态电容可以很高，并且即使在容易发生瞬时电位下降的情况下也可以发挥足够的去耦效应。

公开(公告)号：US07856710B2

公开(公告)日：2010-12-28

申请号：US11964355

申请日：2007-12-26

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01K3/10

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of manufacturing a printed wiring board including preparing a high-dielectric capacitor sheet including a ceramic high-dielectric layer sandwiched by upper and lower electrode sheets, attaching the high-dielectric capacitor sheet to a first insulating layer, forming through holes for the upper and lower electrode sheets such that the through holes penetrate through the ceramic high-dielectric layer and upper and lower electrode sheets, forming a second insulating layer which fills the through holes and covers an upper surface of the high-dielectric capacitor sheet, forming an upper electrode connecting first hole, an upper electrode connecting second hole and a lower electrode connecting hole, filling the upper holes with conductive material such that the upper electrode connecting first hole and the upper electrode connecting second hole are connected to form an upper electrode connection portion, and filling the lower electrode connecting hole with conductive material to form a lower electrode connecting portion.

Abstract translation: 一种印刷电路板的制造方法，其特征在于，包括：制作包含由上下电极片夹着的陶瓷高电介质层的高介电电容器片，将所述高介电电容片贴附在第一绝缘层上， 和下电极片，使得通孔穿过陶瓷高介电层和上下电极片，形成填充通孔并覆盖高介电电容器片的上表面的第二绝缘层，形成上电极片 电极连接第一孔，上电极连接第二孔和下电极连接孔，用导电材料填充上孔，使得连接第一孔和连接第二孔的上电极的上电极连接形成上电极连接部， 并用导电材料填充下电极连接孔 m为下部电极连接部。

公开(公告)号：US08093508B2

公开(公告)日：2012-01-10

申请号：US12758908

申请日：2010-04-13

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/16 ,  H05K1/11

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board including a first insulating layer, a second insulating layer formed over the first insulating layer, a capacitor portion including an upper electrode, a lower electrode and a ceramic high dielectric layer formed between the upper electrode and the lower electrode, the capacitor portion sandwiched by the first insulating layer and the second insulating layer, an upper electrode connecting portion passing through the capacitor portion without contact and through the second insulating layer and electrically connected to the upper electrode of the capacitor portion, and a lower electrode connecting portion passing through the second insulating layer and the upper electrode of the capacitor portion without contact and electrically connected to the lower electrode in contact.

Abstract translation: 一种印刷布线板，包括形成在第一绝缘层上的第一绝缘层，第二绝缘层，形成在上电极和下电极之间的上电极，下电极和陶瓷高介电层的电容器部分，电容器 夹在第一绝缘层和第二绝缘层之间的部分，通过电容器部分而没有接触并穿过第二绝缘层并电连接到电容器部分的上电极的上电极连接部分和通过电容器部分的下电极连接部分 通过第二绝缘层和电容器部分的上电极而不接触并与下电极接触地电连接。

公开(公告)号：US08837160B2

公开(公告)日：2014-09-16

申请号：US13175683

申请日：2011-07-01

Applicant: Takashi Kariya ,  Hironori Tanaka

Inventor： Takashi Kariya ,  Hironori Tanaka

IPC: H05K1/16 ,  H01L21/48 ,  H01L23/50 ,  H01L23/498 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K1/162 ,  H01L21/4867 ,  H01L23/498 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/388 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A method of producing a capacitor for a printed circuit board includes producing high-dielectric sheets and selecting ones of the high-dielectric sheets, which are substantially free from a defect after the heat process. Each of the high-dielectric sheets is produced by providing a first electrode, forming a first sputter film on the first electrode, forming an intermediate layer on the first sputter film by calcining a sol-gel film, forming a second sputter film on the intermediate layer, and providing a second electrode on the second sputter film. The high-dielectric sheets are subjected to a heat process in which the high-dielectric sheets are subjected to a first temperature at least once and a second temperature higher than the first temperature at least once.

Abstract translation: 一种印刷电路板用电容器的制造方法，其特征在于，制造高介电质片材，并选择在热处理后基本上不存在缺陷的高电介质片材。 每个高电介质片通过提供第一电极来制造，在第一电极上形成第一溅射膜，通过煅烧溶胶 - 凝胶膜在第一溅射膜上形成中间层，在中间层上形成第二溅射膜 并且在第二溅射膜上提供第二电极。 对高电介质片材进行热处理，其中高电介质片材经受至少一次的第一温度和比第一温度高至少一次的第二温度。