公开(公告)号：US5065547A

公开(公告)日：1991-11-19

申请号：US362209

申请日：1989-06-06

申请人： Tatsuo Shimizu ,  Kazunori Ozawa ,  Kenji Yazawa ,  Kazunori Tani

发明人： Tatsuo Shimizu ,  Kazunori Ozawa ,  Kenji Yazawa ,  Kazunori Tani

IPC分类号： B24B21/00 ,  B24B21/04 ,  B24B21/06 ,  G11B5/84 ,  G11B23/50

CPC分类号： G11B23/50 ,  B24B21/004 ,  B24B21/04 ,  B24B21/06 ,  B24B41/061 ,  G11B5/8404

摘要： A surface processing machine employing a processing tape cartridge for polishing or grinding disks or the like. The machine employs a processing tape cartridge which rotatably accommodates in a casing a pair of reels for the winding of processing tape. The machine comprises a cartridge holder for holding the tape cartridge; a tape drawing mechanism to draw out a portion of the processing tape in the cartridge; a guide roller mechanism for setting and transporting the processing tape on a predetermined path of travel; a work holder mechanism adapted to hold and rotate a work at its machining position; and a tape pressing mechanism for pressing the processing tape against the work.

摘要翻译： 使用用于抛光或研磨盘等的处理带盒的表面处理机。 该机器采用可旋转地容纳在壳体中的用于卷绕处理带的一对卷轴的处理带盒。 该机器包括用于保持带盒的盒保持器; 卷取机构，用于抽出盒中的处理带的一部分; 引导辊机构，用于在预定的行进路径上设置和运送处理带; 工件保持机构，其适于在其加工位置保持和旋转工件; 以及用于将处理带压在工件上的带按压机构。

公开(公告)号：US5065548A

公开(公告)日：1991-11-19

申请号：US362211

申请日：1989-06-06

申请人： Tatsuo Shimizu ,  Kazunori Ozawa ,  Kenji Yazawa ,  Kazunori Tani

发明人： Tatsuo Shimizu ,  Kazunori Ozawa ,  Kenji Yazawa ,  Kazunori Tani

IPC分类号： B24B21/00 ,  B24B21/04 ,  G11B5/84 ,  G11B23/50

CPC分类号： G11B5/8404 ,  B24B21/004 ,  B24B21/04 ,  G11B23/50

摘要： Described herein is a surface treating tape cartridge packaging a surface treating tape in a casing ready for loading the tape on a surface treating machine, and a surface treating machine capable of automatically loading a surface treating tape in position from such a cartridge, the tape cartridge being basically composed of: a casing formed by separably joined upper and lower halves; and a pair of reels carrying a roll of surface treating tape and rotatably accommodated between the upper and lower halves of the casing.

摘要翻译： 本文描述了一种表面处理带盒，其将表面处理带包装在准备好将带装载在表面处理机上的壳体中，以及能够自动地将表面处理带从这种盒装载到位的表面处理机，带盒 基本上由以下部分组成：由可分离地连接的上半部和下半部形成的壳体; 以及一对带有一卷表面处理带并可旋转地容纳在壳体的上半部和下半部之间的卷轴。

公开(公告)号：US08927404B2

公开(公告)日：2015-01-06

申请号：US13445328

申请日：2012-04-12

申请人： Tatsuo Shimizu ,  Masato Koyama

发明人： Tatsuo Shimizu ,  Masato Koyama

IPC分类号： H01L21/4763 ,  H01L29/51 ,  H01L21/318 ,  H01L49/02 ,  H01L21/28 ,  H01L21/316 ,  H01L21/3115 ,  H01L29/66

CPC分类号： H01L29/517 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/316 ,  H01L21/318 ,  H01L28/40 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/788 ,  H01L29/792

摘要： It is made possible to provide an insulating film that can reduce the leakage current. An insulating film includes: an amorphous oxide dielectric film containing a metal, hydrogen, and nitrogen. The nitrogen amount [N] and the hydrogen amount [H] in the oxide dielectric film satisfy the following relationship: {[N]—[H]}/2≦1.0×1021 cm−3.

摘要翻译： 可以提供能够减小漏电流的绝缘膜。 绝缘膜包括：含有金属，氢和氮的非晶氧化物介电膜。 氧化物电介质膜中的氮量[N]和氢量[H]满足以下关系：{[N] - [H]} / 2＆nlE; 1.0×1021cm-3。

公开(公告)号：US08817671B2

公开(公告)日：2014-08-26

申请号：US13325489

申请日：2011-12-14

申请人： Tatsuo Shimizu ,  Uichiro Omae

发明人： Tatsuo Shimizu ,  Uichiro Omae

IPC分类号： H04B1/56 ,  H03F3/45

CPC分类号： H04L5/14 ,  H04L25/0272

摘要： Disclosed herein is a full duplex transmission circuit including: a first internal input terminal receiving a signal to be transmitted; a second internal input terminal receiving a signal having an amplitude equal to ½ times the amplitude of the signal to be transmitted and having the same phase as the phase of the signal to be transmitted; an external input/output terminal; an internal output terminal; a first metal oxide semiconductor transistor; and the second metal oxide semiconductor transistor. A current generated by the current source as well as the sizes of the first and second metal oxide semiconductor transistors are set so that the transconductances of the first and second metal oxide semiconductor transistors become equal to 1/Z.

摘要翻译： 这里公开了一种全双工传输电路，包括：第一内部输入端子，接收待传输的信号; 第二内部输入端子接收具有等于要发送的信号的振幅的1/2倍的信号的信号，并且具有与要发送的信号的相位相同的相位; 外部输入/输出端子; 内部输出端子; 一第一金属氧化物半导体晶体管; 和第二金属氧化物半导体晶体管。 设置由电流源产生的电流以及第一和第二金属氧化物半导体晶体管的尺寸，使得第一和第二金属氧化物半导体晶体管的跨导变为等于1 / Z。

公开(公告)号：US08436417B2

公开(公告)日：2013-05-07

申请号：US12880711

申请日：2010-09-13

申请人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

发明人： Tatsuo Shimizu ,  Atsuhiro Kinoshita

IPC分类号： H01L29/792

CPC分类号： H01L29/792 ,  B82Y10/00 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/42348 ,  H01L29/66833

摘要： According to one embodiment, in a semiconductor memory device, a source region and a drain region are disposed away from each other in the semiconductor layer. A tunnel insulating film is formed between the source region and the drain region on the semiconductor layer. A charge accumulating film includes an oxide cluster and is formed on the tunnel insulating film. A block insulating film is formed on the charge accumulating film. A gate electrode is formed on the block insulating film. The oxide cluster includes either Zr or Hf, and further contains at least one element selected from Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Cd, Ta, W, Re, Os, Ir, Pt, Au and Hg.

摘要翻译： 根据一个实施例，在半导体存储器件中，源极区域和漏极区域在半导体层中彼此远离地设置。 在半导体层上的源极区域和漏极区域之间形成隧道绝缘膜。 电荷累积膜包括氧化物簇并形成在隧道绝缘膜上。 在电荷累积膜上形成块绝缘膜。 栅电极形成在块绝缘膜上。 氧化物簇包括Zr或Hf，还含有选自Ti，V，Cr，Mn，Fe，Co，Ni，Cu，Zn，Nb，Mo，Tc，Ru，Rh，Pd，Ag中的至少一种元素， Cd，Ta，W，Re，Os，Ir，Pt，Au和Hg。

公开(公告)号：US07960793B2

公开(公告)日：2011-06-14

申请号：US12370641

申请日：2009-02-13

申请人： Tatsuo Shimizu ,  Masato Koyama

发明人： Tatsuo Shimizu ,  Masato Koyama

IPC分类号： H01L29/78

CPC分类号： H01L21/823857 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/1203 ,  H01L29/785

摘要： According to one embodiment, it is possible to provide a semiconductor device provided with an MIS transistor which has an effective work function being, as much as possible, suitable for low threshold operation. A CMIS device provided with an electrode having an optimal effective work function and enabling low threshold operation to achieve by producing an in-gap level by the addition of a high valence metal in an Hf (or Zr) oxide and changing a position of the in-gap level by nitrogen or fluorine or the like has been realized.

摘要翻译： 根据一个实施例，可以提供一种设置有MIS晶体管的半导体器件，该半导体器件具有尽可能多的适合于低阈值操作的有效功函数。 具有电极的CMIS器件具有最佳的有效功函数，并且能够通过在Hf（或Zr）氧化物中添加高价金属而产生空隙间电平来实现低阈值操作，从而改变位于 通过氮或氟等的差异水平已经实现。

公开(公告)号：US07859077B2

公开(公告)日：2010-12-28

申请号：US11937730

申请日：2007-11-09

申请人： Kazushige Yamamoto ,  Tatsuo Shimizu

发明人： Kazushige Yamamoto ,  Tatsuo Shimizu

IPC分类号： H01L31/06

CPC分类号： H01L27/1443 ,  H04B10/801

摘要： A semiconductor device includes: an n-type MOS transistor and a p-type MOS transistor connected in series; and a first gate extending via an insulating film above a channel of the n-type MOS transistor and a channel of the p-type MOS transistor. By providing light to the first gate, electrons and holes are generated, at least one of either of the electrons and holes passes through above the channel of the n-type MOS transistor and at least one of the either of the electrons and holes passes through above the channel of the p-type MOS transistor, whereby the n-type MOS transistor and the p-type MOS transistor are switched.

摘要翻译： 半导体器件包括：串联连接的n型MOS晶体管和p型MOS晶体管; 以及通过n型MOS晶体管的沟道上的绝缘膜和p型MOS晶体管的沟道延伸的第一栅极。 通过向第一栅极提供光，产生电子和空穴，电子和空穴中的至少一个通过n型MOS晶体管的沟道上方，并且任一电子和空穴中的至少一个穿过 在p型MOS晶体管的沟道之上，从而切换n型MOS晶体管和p型MOS晶体管。

公开(公告)号：US07809039B2

公开(公告)日：2010-10-05

申请号：US12409693

申请日：2009-03-24

申请人： Kazushige Yamamoto ,  Haruhiko Yoshida ,  Tatsuo Shimizu

发明人： Kazushige Yamamoto ,  Haruhiko Yoshida ,  Tatsuo Shimizu

IPC分类号： H01S5/00

CPC分类号： H01S5/125 ,  B82Y20/00 ,  H01S5/021 ,  H01S5/026 ,  H01S5/1032 ,  H01S5/1071 ,  H01S5/30 ,  H01S5/3224 ,  H01S5/34 ,  H01S5/3428

摘要： A semiconductor light-emitting device including an insulating film, an optical resonator formed on the insulating film, and a p-electrode and an n-electrode which are disposed on the both sides of the optical resonator, respectively. The optical resonator includes a first semiconductor wire and a second semiconductor wire which are arranged in parallel with a space left therebetween, the space being narrower than emission wavelength, resonator mirrors disposed at the both ends of these semiconductor wires, and a plurality of semiconductor ultra-thin films which are interposed between the first semiconductor wire and the second semiconductor wire and are electrically connected with these semiconductor wires, the first semiconductor wire is electrically connected with the p-electrode, and the second semiconductor wire is electrically connected with the n-electrode, thereby enabling the semiconductor ultra-thin films to generate laser oscillation as a current is injected thereinto.

摘要翻译： 一种半导体发光装置，分别包括绝缘膜，形成在绝缘膜上的光谐振器，以及分别设置在光谐振器两侧的p电极和n电极。 光谐振器包括：第一半导体布线和第二半导体布线，它们与其间隔开的空间平行设置，该空间比发射波长窄，设置在这些半导体布线两端的谐振镜，以及多个半导体超导体 介于第一半导体布线和第二半导体布线之间并与这些半导体布线电连接的第一半导体布线与p电极电连接，第二半导体布线与n型电极电连接， 电极，从而使得半导体超薄膜能够在注入电流时产生激光振荡。

公开(公告)号：US07755136B2

公开(公告)日：2010-07-13

申请号：US11684757

申请日：2007-03-12

申请人： Yukie Nishikawa ,  Akira Takashima ,  Tatsuo Shimizu

发明人： Yukie Nishikawa ,  Akira Takashima ,  Tatsuo Shimizu

IPC分类号： H01L29/788

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/513 ,  H01L29/7885

摘要： A memory cell in a nonvolatile semiconductor memory device includes a tunneling insulating film, a floating gate electrode made of a Si containing conductive material, an inter-electrode insulating film made of rare-earth oxide, rare-earth nitride or rare-earth oxynitride, a control gate electrode, and a metal silicide film formed between the floating gate electrode and the inter-electrode insulating film.

摘要翻译： 非易失性半导体存储器件中的存储单元包括隧道绝缘膜，由含Si导电材料制成的浮栅，由稀土氧化物制成的电极间绝缘膜，稀土氮化物或稀土氧氮化物， 一个控制栅极电极和一个形成在浮置栅电极和电极间绝缘膜之间的金属硅化物膜。

公开(公告)号：US20100052035A1

公开(公告)日：2010-03-04

申请号：US12403493

申请日：2009-03-13

申请人： Masahiro KOIKE ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

发明人： Masahiro KOIKE ,  Yuichiro Mitani ,  Tatsuo Shimizu ,  Naoki Yasuda ,  Yasushi Nakasaki ,  Akira Nishiyama

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L29/513

摘要： A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and a second insulating layer formed on the first insulating layer and having a higher dielectric constant than the first insulating layer, the second insulating layer having a first site performing hole trapping and releasing, the first site being formed by adding an element different from a base material to the second insulating film, the first site being located at a lower level than a Fermi level of a material forming the semiconductor layer; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.

摘要翻译： 一种非易失性半导体存储器件，包括：在半导体层中形成为彼此间隔一定距离的源区和漏区; 形成在位于源极区域和漏极区域之间的半导体层上的第一绝缘膜，所述第一绝缘膜包括形成在所述第一绝缘层上并具有比所述第一绝缘层高的介电常数的第一绝缘层和第二绝缘层 所述第二绝缘层具有进行孔捕获和释放的第一部位，所述第一部位通过将不同于基材的元素添加到所述第二绝缘膜而形成，所述第一部位位于比所述第二绝缘膜的费米能级更低的水平 形成半导体层的材料; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制栅电极。