公开(公告)号：US20120091435A1

公开(公告)日：2012-04-19

申请号：US13319910

申请日：2010-05-10

申请人： Tetsuya Ikuta ,  Jo Shimizu ,  Tomohiko Shibata ,  Ryo Sakamoto ,  Tsuneo Ito

发明人： Tetsuya Ikuta ,  Jo Shimizu ,  Tomohiko Shibata ,  Ryo Sakamoto ,  Tsuneo Ito

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： H01L29/207 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/1075 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/7786

摘要： An epitaxial substrate for electronic devices is provided, which can improve vertical breakdown voltage and provides a method of producing the same.The epitaxial substrate includes a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a Ba1Alb1Gac1Ind1N material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a Ba2Alb2Gac2Ind2N material and a second layer made of a Ba3Alb3Gac3Ind3N material having a different band gap from the first layer.

摘要翻译： 提供了一种用于电子器件的外延衬底，其可以提高垂直击穿电压并提供其制造方法。 外延衬底包括导电SiC单晶衬底，在SiC单晶衬底上作为绝缘层的缓冲层，以及通过在缓冲器上外延生长多个III族氮化物层而形成的主层压体。 此外，缓冲器至少包括与SiC单晶衬底接触的初始生长层和在初始生长层上具有超晶格多层结构的超晶格层压体。 初始生长层由Ba1Alb1Gac1Ind1N材料制成。 此外，超晶格层叠体通过交替堆叠由Ba2Alb2Gac2Ind2N材料制成的第一层和由与第一层具有不同带隙的Ba3Alb3Gac3Ind3N材料制成的第二层而构成。

公开(公告)号：US08426893B2

公开(公告)日：2013-04-23

申请号：US13319910

申请日：2010-05-10

申请人： Tetsuya Ikuta ,  Jo Shimizu ,  Tomohiko Shibata ,  Ryo Sakamoto ,  Tsuneo Ito

发明人： Tetsuya Ikuta ,  Jo Shimizu ,  Tomohiko Shibata ,  Ryo Sakamoto ,  Tsuneo Ito

IPC分类号： H01L31/00

CPC分类号： H01L29/207 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/1075 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/7786

摘要： An epitaxial substrate for electronic devices is provided, which can improve vertical breakdown voltage and provides a method of producing the same. The epitaxial substrate includes a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a Ba1Alb1Gac1Ind1N material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a Ba2Alb2Gac2Ind2N material and a second layer made of a Ba3Alb3Gac3Ind3N material having a different band gap from the first layer.

摘要翻译： 提供了一种用于电子器件的外延衬底，其可以提高垂直击穿电压并提供其制造方法。 外延衬底包括导电SiC单晶衬底，在SiC单晶衬底上作为绝缘层的缓冲器，以及通过在缓冲器上外延生长多个III族氮化物层而形成的主叠层。 此外，缓冲器至少包括与SiC单晶衬底接触的初始生长层和在初始生长层上具有超晶格多层结构的超晶格层压体。 初始生长层由Ba1Alb1Gac1Ind1N材料制成。 此外，超晶格层叠体通过交替堆叠由Ba2Alb2Gac2Ind2N材料制成的第一层和由与第一层具有不同带隙的Ba3Alb3Gac3Ind3N材料制成的第二层而构成。

公开(公告)号：US20120153440A1

公开(公告)日：2012-06-21

申请号：US13388804

申请日：2010-08-02

申请人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

发明人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

IPC分类号： H01L29/38 ,  C30B25/18

CPC分类号： H01L29/7786 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/187 ,  H01L29/66462 ,  H01L29/66863 ,  H01L29/812

摘要： An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 Ω·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 Ω·cm or more.

摘要翻译： 电流装置的外延基板及其制造方法，其中电流沿横向流动并且翘曲构造被适当地控制。 通过将低电阻Si单晶衬底和高电阻Si单晶衬底结合在一起来形成键合衬底来制造电子器件外延衬底; 在高电阻Si单晶衬底侧的键合衬底的表面上形成缓冲层作为绝缘层; 以及通过在缓冲器上外延生长多个III族氮化物层以形成主层压板来制造外延衬底。 低电阻Si单晶衬底的电阻率为100Ω·cm·cm以下，高电阻Si单晶衬底的电阻率为1000Ω·cm·cm以上。

公开(公告)号：US08946863B2

公开(公告)日：2015-02-03

申请号：US13388804

申请日：2010-08-02

申请人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

发明人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L21/18 ,  H01L29/812 ,  H01L21/02

CPC分类号： H01L29/7786 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/187 ,  H01L29/66462 ,  H01L29/66863 ,  H01L29/812

摘要： An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 Ω·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 Ω·cm or more.

摘要翻译： 电流装置的外延基板及其制造方法，其中电流沿横向流动并且翘曲构造被适当地控制。 通过将低电阻Si单晶衬底和高电阻Si单晶衬底结合在一起来形成键合衬底来制造电子器件外延衬底; 在高电阻Si单晶衬底侧的键合衬底的表面上形成缓冲层作为绝缘层; 以及通过在缓冲器上外延生长多个III族氮化物层以形成主层压板来制造外延衬底。 低电阻Si单晶衬底的电阻率为100Ω·cm·cm以下，高电阻Si单晶衬底的电阻率为1000Ω·cm·cm以上。

公开(公告)号：US20120168719A1

公开(公告)日：2012-07-05

申请号：US13384006

申请日：2010-07-13

申请人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

发明人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

IPC分类号： H01L29/06 ,  H01L21/66

CPC分类号： H01L29/7787 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/02658 ,  H01L22/14 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/66462

摘要： To provide an epitaxial substrate for electronic devices, in which current flows in a lateral direction, which enables accurate measurement of the sheet resistance of HEMTs without contact, and to provide a method of efficiently producing the epitaxial substrate for electronic devices, the method characteristically includes the steps of forming a barrier layer against impurity diffusion on one surface of a high-resistance Si-single crystal substrate, forming a buffer as an insulating layer on the other surface of the high-resistance Si-single crystal substrate, producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate, and measuring resistance of the main laminate of the epitaxial substrate without contact.

摘要翻译： 为了提供一种电子器件的外延衬底，其中电流沿横向流动，这使得能够精确地测量HEMT的薄层电阻而不接触，并且提供了一种有效地制造用于电子器件的外延衬底的方法，该方法的特征在于包括 在高电阻Si单晶衬底的一个表面上形成抵抗杂质扩散的阻挡层的步骤，在高电阻Si-单晶衬底的另一个表面上形成作为绝缘层的缓冲层，产生外延衬底 通过在缓冲器上外延生长多个III族氮化物层以形成主层压板，并测量外延衬底的主层压体的电阻而不接触。

公开(公告)号：US08710489B2

公开(公告)日：2014-04-29

申请号：US13384006

申请日：2010-07-13

申请人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

发明人： Tetsuya Ikuta ,  Daisuke Hino ,  Ryo Sakamoto ,  Tomohiko Shibata

IPC分类号： H01L29/06 ,  H01L31/00

CPC分类号： H01L29/7787 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/02658 ,  H01L22/14 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/66462

摘要： To provide an epitaxial substrate for electronic devices, in which current flows in a lateral direction, which enables accurate measurement of the sheet resistance of HEMTs without contact, and to provide a method of efficiently producing the epitaxial substrate for electronic devices, the method characteristically includes the steps of forming a barrier layer against impurity diffusion on one surface of a high-resistance Si-single crystal substrate, forming a buffer as an insulating layer on the other surface of the high-resistance Si-single crystal substrate, producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate, and measuring resistance of the main laminate of the epitaxial substrate without contact.

摘要翻译： 为了提供一种电子器件的外延衬底，其中电流沿横向流动，这使得能够精确地测量HEMT的薄层电阻而不接触，并且提供了一种有效地制造用于电子器件的外延衬底的方法，该方法的特征在于包括 在高电阻Si单晶衬底的一个表面上形成抵抗杂质扩散的阻挡层的步骤，在高电阻Si-单晶衬底的另一个表面上形成作为绝缘层的缓冲层，产生外延衬底 通过在缓冲器上外延生长多个III族氮化物层以形成主层压板，并测量外延衬底的主层压体的电阻而不接触。

公开(公告)号：US08344356B2

公开(公告)日：2013-01-01

申请号：US12735259

申请日：2008-12-17

申请人： Ryo Sakamoto ,  Jo Shimizu ,  Tsuneo Ito ,  Takashi Egawa

发明人： Ryo Sakamoto ,  Jo Shimizu ,  Tsuneo Ito ,  Takashi Egawa

IPC分类号： H01L296/06

CPC分类号： H01L29/155 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/04 ,  H01L33/12

摘要： A semiconductor material is provided comprising: a composition graded layer, formed on a Si substrate or an interlayer formed thereon, comprising a composition of AlXGa1-XN graded such that a content ratio of Al in the composition decreases continuously or discontinuously in a crystal growing direction; a superlattice composite layer, formed on the composition graded layer, comprising a high Al-containing layer comprising a composition of AlYGa1-YN and a low Al-containing layer comprising a composition of AlZGa1-ZN that are laminated alternately; and a nitride semiconductor layer formed on the superlattice composite layer.

摘要翻译： 提供了一种半导体材料，包括：在Si衬底或其上形成的中间层上形成的组成分级层，其包含AlXGa1-XN的组成，其分级使得组合物中Al的含量比在晶体生长方向上连续地或不连续地降低 ; 在组成梯度层上形成的超晶格复合层，包括含有AlYGa1-YN组成的高含Al层和交替叠层的包含AlZGa1-ZN组成的低含Al层; 以及形成在超晶格复合层上的氮化物半导体层。

公开(公告)号：US20110001127A1

公开(公告)日：2011-01-06

申请号：US12735259

申请日：2008-12-17

申请人： Ryo Sakamoto ,  Jo Shimizu ,  Tsuneo Ito ,  Takashi Egawa

发明人： Ryo Sakamoto ,  Jo Shimizu ,  Tsuneo Ito ,  Takashi Egawa

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： H01L29/155 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/04 ,  H01L33/12

摘要： A semiconductor material is provided comprising: a composition graded layer, formed on a Si substrate or an interlayer formed thereon, comprising a composition of AlXGa1-XN graded such that a content ratio of Al in the composition decreases continuously or discontinuously in a crystal growing direction; a superlattice composite layer, formed on the composition graded layer, comprising a high Al-containing layer comprising a composition of AlYGa1-YN and a low Al-containing layer comprising a composition of AlZGa1-ZN that are laminated alternately; and a nitride semiconductor layer formed on the superlattice composite layer.

摘要翻译： 提供了一种半导体材料，包括：在Si衬底或其上形成的中间层上形成的组成分级层，其包含AlXGa1-XN的组成，其分级使得组合物中Al的含量比在晶体生长方向上连续地或不连续地降低 ; 在组成梯度层上形成的超晶格复合层，包括含有AlYGa1-YN组成的高含Al层和交替叠层的包含AlZGa1-ZN组成的低含Al层; 以及形成在超晶格复合层上的氮化物半导体层。

公开(公告)号：US08044439B2

公开(公告)日：2011-10-25

申请号：US12088983

申请日：2006-09-28

申请人： Ryo Sakamoto ,  Masatoshi Iwata ,  Susumu Tsujikawa ,  Yoshiyuki Kobayashi

发明人： Ryo Sakamoto ,  Masatoshi Iwata ,  Susumu Tsujikawa ,  Yoshiyuki Kobayashi

IPC分类号： H01L27/148

CPC分类号： H01S5/18311 ,  H01L33/025 ,  H01L33/105 ,  H01L33/145 ,  H01L33/32 ,  H01S5/0282

摘要： A light-emitting device (1) is provided having a current blocking layer (9) of buried structure, a portion of the current blocking layer (9) having an oxygen concentration higher than that of a light-emitting layer, the current blocking layer being of a thickness of not less than 5 nm and not more than 100 nm. It includes an etching stop layer (24) below the current blocking layer (9), the etching stop layer being good in oxidation resistance. The light-emitting device (1) and its manufacturing method are provided such that the device has its current confinement effect improved and its output increased at lower forward voltage.

摘要翻译： 提供一种发光器件（1），其具有掩埋结构的电流阻挡层（9），电流阻挡层（9）的氧浓度高于发光层的一部分，电流阻挡层 厚度不小于5nm且不大于100nm。 它包括在电流阻挡层（9）下方的蚀刻停止层（24），该抗蚀剂层具有良好的抗氧化性。 提供发光装置（1）及其制造方法，使得该装置的电流约束效果得到改善，并且其输出在较低的正向电压下增加。

公开(公告)号：US07989799B2

公开(公告)日：2011-08-02

申请号：US12225714

申请日：2007-03-27

申请人： Ryo Sakamoto ,  Masatoshi Iwata

发明人： Ryo Sakamoto ,  Masatoshi Iwata

IPC分类号： H01L29/06

CPC分类号： H01L33/105

摘要： Provided is a surface light emitting element having a high productivity, a high light emission output and good response characteristics, as well as capable of suppressing an increase of a forward voltage necessary for light emission. A surface light emitting element according to the present invention is a vertical cavity surface light emitting element including: an active layer 5 in which a quantum well layer 51 and a barrier layer 52 are alternately laminated; and reflective layers disposed both above and below the active layer 5, wherein assuming that a center-to-center distance of a plurality of the quantum well layers is L, a light emission wavelength of the surface light emitting element is λ, and an average refractive index of an optical length of a resonator, being a distance between the reflective layers is n, a condition of λ/(15×n)≦L≦λ/(10×n) is satisfied.

摘要翻译： 提供了具有高生产率，高发光输出和良好响应特性的表面发光元件，并且能够抑制发光所需的正向电压的增加。 根据本发明的表面发光元件是垂直空腔表面发光元件，其包括：交替层叠量子阱层51和阻挡层52的有源层5; 以及设置在有源层5的上方和下方的反射层，其中假设多个量子阱层的中心到中心距离为L，表面发光元件的发光波长为λ，平均 作为反射层之间的距离的谐振器的光学长度的折射率为n，满足λ/（15×n）＆nlE; L＆nlE;λ/（10×n）的条件。