公开(公告)号：US5891265A

公开(公告)日：1999-04-06

申请号：US907073

申请日：1997-08-06

申请人： Tetsuya Nakai ,  Hiroshi Shinyashiki ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Tetsuya Nakai ,  Hiroshi Shinyashiki ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L21/265 ,  H01L21/322 ,  H01L21/324 ,  H01L21/76 ,  H01L21/762 ,  H01L27/00 ,  H01L27/12

CPC分类号： H01L21/324 ,  H01L21/26533 ,  H01L21/76243

摘要： Oxygen ion is implanted into a silicon substrate to remain a silicon layer on a surface of the silicon substrate. In this state, a silicon oxide layer is formed under the silicon layer. Silicon oxide particles are formed and remained in the residual silicon layer. While maintaining this state, the silicon substrate is heated to a predetermined temperature not less than 1300.degree. C. Alternatively, the silicon substrate is heated at a high temperature-rise rate to 900-1100.degree. C., and thereafter is heated at a low temperature-rise rate to the temperature not less than 1300.degree. C. The silicon substrate is held at the predetermined temperature not less than 1300.degree. C. for a predetermined time, whereby crystallinity of the residual silicon layer is restored. A pinning effect of the silicon oxide particles prevents the rise of dislocation to the surface of the SOI layer, and also suppresses a rate per a unit time at which interstitial silicon generates during the heating to the high temperature region. Therefore, a dislocation density of the SOI layer can be reduced.

摘要翻译： 将氧离子注入硅衬底中以在硅衬底的表面上保留硅层。 在该状态下，在硅层的下方形成氧化硅层。 形成氧化硅颗粒并残留在残余硅层中。 在保持该状态的同时，将硅衬底加热到​​不低于1300℃的预定温度。或者，将硅衬底以高升温速率加热至900-1100℃，然后在低温下加热 温度升至不低于1300℃的温度。硅衬底在预定温度不低于1300℃保持预定时间，从而恢复残留硅层的结晶度。 氧化硅颗粒的钉扎效应防止了位于SOI层表面的位错的上升，并且还抑制了在向高温区域加热期间间隙硅产生的每单位时间的速率。 因此，可以降低SOI层的位错密度。

公开(公告)号：US5741717A

公开(公告)日：1998-04-21

申请号：US391283

申请日：1995-02-21

申请人： Tetsuya Nakai ,  Hiroshi Shinyashiki ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Tetsuya Nakai ,  Hiroshi Shinyashiki ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L21/265 ,  H01L21/322 ,  H01L21/324 ,  H01L21/76 ,  H01L21/762 ,  H01L27/00 ,  H01L27/12

CPC分类号： H01L21/324 ,  H01L21/26533 ,  H01L21/76243

摘要： Oxygen ion is implanted into a silicon substrate to remain a silicon layer on a surface of the silicon substrate. In this state, a silicon oxide layer is formed under the silicon layer. Silicon oxide particles are formed and remained in the residual silicon layer. While maintaining this state, the silicon substrate is heated to a predetermined temperature not less than 1300.degree. C. Alternatively, the silicon substrate is heated at a high temperature-rise rate to 900.degree.-1100.degree. C., and thereafter is heated at a low temperature-rise rate to the temperature not less than 1300.degree. C. The silicon substrate is held at the predetermined temperature not less than 1300.degree. C. for a predetermined time, whereby crystallinity of the residual silicon layer is restored. A pinning effect of the silicon oxide particles prevents the rise of dislocation to the surface of the SOI layer, and also suppresses a rate per a unit time at which interstitial silicon generates during the heating to the high temperature region. Therefore, a dislocation density of the SOI layer can be reduced.

摘要翻译： 将氧离子注入硅衬底中以在硅衬底的表面上保留硅层。 在该状态下，在硅层的下方形成氧化硅层。 形成氧化硅颗粒并残留在残余硅层中。 在保持该状态的同时，将硅衬底加热到​​不低于1300℃的预定温度。或者，将硅衬底以高升温速率加热到900-111℃，然后在 低温升温速率不低于1300℃。硅衬底在预定温度不低于1300℃保持预定时间，从而恢复残余硅层的结晶度。 氧化硅颗粒的钉扎效应防止了位于SOI层表面的位错上升，并且还抑制了在加热到高温区域期间间隙硅产生的每单位时间的速率。 因此，可以降低SOI层的位错密度。

公开(公告)号：US5616507A

公开(公告)日：1997-04-01

申请号：US444590

申请日：1995-05-19

申请人： Tetsuya Nakai ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Tetsuya Nakai ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/20 ,  H01L21/265 ,  H01L21/322 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/3226 ,  H01L21/2022 ,  H01L21/26533 ,  H01L21/76243

摘要： A polysilicon layer is formed on a surface of a silicon substrate after oxygen ions are implanted into the silicon substrate and an SiO.sub.2 film is formed in the silicon substrate at a position in a prescribed depth from the surface of silicon substrate. A heat treatment is performed to a silicon layer between the polysilicon layer and the SiO.sub.2 film, thereby providing an SOI layer with improved crystal quality.

摘要翻译： 在将氧离子注入到硅衬底中之后，在硅衬底的表面上形成多晶硅层，并且在硅衬底中形成从硅衬底表面规定深度的位置形成SiO 2膜。 对多晶硅层和SiO 2膜之间的硅层进行热处理，从而提供具有改善的晶体质量的SOI层。

公开(公告)号：US5441899A

公开(公告)日：1995-08-15

申请号：US017257

申请日：1993-02-12

申请人： Tetsuya Nakai ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Tetsuya Nakai ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/20 ,  H01L21/265 ,  H01L21/322 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/3226 ,  H01L21/2022 ,  H01L21/26533 ,  H01L21/76243

摘要： A polysilicon or amorphous Si layer is formed on a surface of a silicon substrate. Oxygen ions are implanted into the silicon substrate through the polysilicon layer, and an SiO.sub.2 film is formed in the silicon substrate at a position in a prescribed depth from the surface of silicon substrate. A heat treatment is performed to a silicon layer between the polysilicon layer and the SiO.sub.2 film, thereby providing an SOI layer with improved crystal quality.

摘要翻译： 在硅衬底的表面上形成多晶硅或非晶Si层。 氧离子通过多晶硅层注入到硅衬底中，并且在硅衬底中在与硅衬底表面规定深度的位置处形成SiO 2膜。 对多晶硅层和SiO 2膜之间的硅层进行热处理，从而提供具有改善的晶体质量的SOI层。

公开(公告)号：US06351014B2

公开(公告)日：2002-02-26

申请号：US09519598

申请日：2000-03-06

申请人： Yasuo Inoue ,  Tadashi Nishimura ,  Yasuo Yamaguchi ,  Toshiaki Iwamatsu

发明人： Yasuo Inoue ,  Tadashi Nishimura ,  Yasuo Yamaguchi ,  Toshiaki Iwamatsu

IPC分类号： H01L2701

CPC分类号： H01L21/8238 ,  H01L21/84 ,  H01L23/4825 ,  H01L27/0921 ,  H01L27/1203 ,  H01L29/78609 ,  H01L29/78612 ,  H01L29/78615 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78654 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.

摘要翻译： 根据本发明的半导体器件，形成场致氧化膜以覆盖SOI层的主表面并到达掩埋氧化膜的主表面。 结果，可以完全电隔离SOI的pMOS有源区和SOI的nMOS有源区。 因此，可以完全防止闭锁。 结果，可以提供使用SOI衬底的半导体器件，该SOI衬底可以通过消除源极和漏极之间的击穿电压的降低来实现高集成度，这是常规SOI场效应晶体管的问题，以及有效地 设置妨碍高集成度的身体接触区域及其制造方法。

公开(公告)号：US06319805B1

公开(公告)日：2001-11-20

申请号：US09499733

申请日：2000-02-08

申请人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L213205

CPC分类号： H01L21/26506 ,  H01L21/26586 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41783 ,  H01L29/458 ,  H01L29/66507 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/78621

摘要： A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.

摘要翻译： 可以获得其中源极/漏极区域的寄生电阻可以比漏极区域的寄生电阻降低的半导体器件及其制造方法。 在半导体装置中，仅将钝化离子注入到半导体层的源极区域，以损坏半导体层的表面附近的晶体，从而促进了硅化反应。 因此，在源极区域中，可以形成更厚的硅化钛膜。

公开(公告)号：US5659194A

公开(公告)日：1997-08-19

申请号：US614256

申请日：1996-03-12

申请人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/28 ,  H01L21/265 ,  H01L21/336 ,  H01L21/76 ,  H01L21/84 ,  H01L27/12 ,  H01L29/45 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L21/26506 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41783 ,  H01L29/458 ,  H01L29/66507 ,  H01L29/66659 ,  H01L29/66772 ,  H01L21/26586 ,  H01L29/78621

摘要： A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.

摘要翻译： 可以获得其中源极/漏极区域的寄生电阻可以比漏极区域的寄生电阻降低的半导体器件及其制造方法。 在半导体装置中，仅将钝化离子注入到半导体层的源极区域，以损坏半导体层的表面附近的晶体，从而促进了硅化反应。 因此，在源极区域中，可以形成更厚的硅化钛膜。

公开(公告)号：US5440161A

公开(公告)日：1995-08-08

申请号：US273175

申请日：1994-07-26

申请人： Toshiaki Iwamatsu ,  Yasuo Yamaguchi ,  Yasuo Inoue ,  Tadashi Nishimura

发明人： Toshiaki Iwamatsu ,  Yasuo Yamaguchi ,  Yasuo Inoue ,  Tadashi Nishimura

IPC分类号： H01L21/76 ,  H01L21/8238 ,  H01L21/8242 ,  H01L21/84 ,  H01L27/08 ,  H01L27/092 ,  H01L27/108 ,  H01L27/12 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/786 ,  H01L27/01 ,  H01L21/265

CPC分类号： H01L29/402 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78609 ,  H01L29/78612

摘要： A buried oxide film 4 is formed on a main surface of a silicon substrate 1. An SOI layer 5 is formed on buried oxide film 4. Channel stop regions 22a and 22b respectively connected to channel regions of an nMOS 2 and a pMOS 3 are formed in an element isolation region of SOI layer 5. nMOS 2 and pMOS 3 are formed in an element formation region of SOI layer. A concentration of a p type impurity or an n type impurity included in channel stop regions 22a and 22b is higher than a concentration of the p type impurity or the n type impurity included in the channel region of nMOS 2 or the channel region of pMOS 3. An FS gate 16 is formed on channel stop regions 22a and 22b with an FS gate oxide film 15 interposed therebetween. Therefore, a semiconductor device having an SOI structure which is capable of suppressing a parasitic bipolar operation by drawing out efficiently excessive carriers stored in the channel region of transistor can be obtained.

摘要翻译： 在硅衬底1的主表面上形成掩埋氧化膜4.在掩埋氧化物膜4上形成SOI层5.形成分别连接到nMOS 2和pMOS 3的沟道区的沟道停止区22a和22b 在SOI层5的元件隔离区域中，在SOI层的元件形成区域中形成nMOS 2和pMOS 3。 包含在通道停止区域22a和22b中的ap型杂质或n型杂质的浓度高于包含在nMOS 2的沟道区域或pMOS 3的沟道区域中的p型杂质或n型杂质的浓度。 FS沟道栅极16形成在通道阻挡区域22a和22b上，其中FS栅氧化膜15插入其间。 因此，可以获得具有SOI结构的半导体器件，该半导体器件能够通过有效地抽出存储在晶体管的沟道区域中的过多的载流子来抑制寄生双极性操作。

公开(公告)号：US5424225A

公开(公告)日：1995-06-13

申请号：US269287

申请日：1994-06-30

申请人： Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/84 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L21/265 ,  H01L21/266

CPC分类号： H01L29/66772 ,  H01L29/786 ,  H01L29/78612 ,  H01L29/78615 ,  H01L2924/0002

摘要： An MOS field effect transistor comprises a channel region (6) of a first conductivity type formed in a semiconductor layer (3) on an insulator substrate (2), a source region (8) and a drain region (9) of a second conductivity type formed in contact with one and the other sides of the channel region (6) in the semiconductor layer (3), respectively, a body region (7) formed in contact with at least a part of the channel region (6) and a part of a periphery of the source region (8) in the semiconductor layer (3) and having a higher impurity concentration than that of the channel region (6), a gate dielectric thin film (4) and a gate electrode (5) formed on the channel region (6), and a conductor (14a) connected in common to the source region (8) and the body region (7).

摘要翻译： MOS场效应晶体管包括形成在绝缘体基板（2）上的半导体层（3）中的第一导电类型的沟道区（6），具有第二导电性的源区（8）和漏区（9） 分别与半导体层（3）中的沟道区（6）的一侧和另一侧接触形成与沟道区（6）的至少一部分形成的主体区（7）和 半导体层（3）中的源极区域（8）的周边的一部分并且具有比沟道区域（6）的杂质浓度更高的杂质浓度，形成栅极电介质薄膜（4）和栅电极（5） 在沟道区域（6）上，以及与源区（8）和体区（7）共同连接的导体（14a）。

公开(公告)号：US5413968A

公开(公告)日：1995-05-09

申请号：US22876

申请日：1993-02-25

申请人： Yasuo Inoue ,  Kazuyuki Sugahara ,  Takashi Ipposhi ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Yasuo Inoue ,  Kazuyuki Sugahara ,  Takashi Ipposhi ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/3205 ,  H01L21/285 ,  H01L21/768 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L27/11 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L23/485 ,  H01L27/11 ,  H01L27/1112 ,  H01L2924/0002

摘要： A semiconductor device includes a conductor layer (3, 7) having a silicon crystal, an insulator layer (5, 15) formed on the surface of the conductor layer (3, 7) having a contact hole therethrough to said surface of the conductor layer (3, 7), an interconnecting portion formed at a predetermined location in the insulator layer (5, 15) and having a contact hole (6, 9) the bottom surface of which becomes the surface of the conductor layer (3, 7), a barrier layer (14) formed at the bottom of said contact hole at least on the surface of the conductor layer (3, 7) in the interconnecting portion, and a metal silicide layer (12) formed on the barrier layer (14). This semiconductor device is manufactured by depositing the insulator layer (5, 15) having the contact hole (6, 9) on the conductor layer (3, 7) having the silicon crystal, forming the barrier layer (14) and the polysilicon layer (7, 10) overlapping each other in the contact hole (6, 9) and on the insulator layer (5, 15) and then patterning these overlapping barrier layer (14) and polysilicon layer (7, 10), forming a metal layer (8, 11) thereon to be silicidized, and removing unreacted metal. The semiconductor device thus manufactured prevents a suction of silicon from the conductor layer (3, 7) to the metal silicide layer (12) and hence prevents an increase in resistance value due to a deficiency of silicon produced in the conductor layer (3, 7), thereby minimizing a series resistance of the metal silicide layer (12), a contact portion and the conductor layer (3, 7).

摘要翻译： 半导体器件包括具有硅晶体的导体层（3,7），形成在导体层（3,7）的表面上的绝缘体层（5,15），其具有穿过其的导体层的所述表面的接触孔 （3,7），形成在所述绝缘体层（5,15）中的预定位置处并具有其底表面成为所述导体层（3,7）的表面的接触孔（6,9）的互连部分， 至少在所述互连部分中的所述导体层（3,7）的表面上形成在所述接触孔的底部处的阻挡层（14）和形成在所述阻挡层（14）上的金属硅化物层（12） 。 该半导体器件通过在具有硅晶体的导体层（3,7）上沉积具有接触孔（6,9）的绝缘体层（5,15），形成阻挡层（14）和多晶硅层（ 7,10）在接触孔（6,9）和绝缘体层（5,15）上彼此重叠，然后对这些重叠的阻挡层（14）和多晶硅层（7,10）进行构图，形成金属层 8,11）在其上被硅化，并除去未反应的金属。 这样制造的半导体器件防止硅从导体层（3,7）吸收到金属硅化物层（12），从而防止由于导体层（3,7）中产生的硅的缺陷导致的电阻值增加 ），从而使金属硅化物层（12），接触部分和导体层（3,7）的串联电阻最小化。