公开(公告)号：US20220223503A1

公开(公告)日：2022-07-14

申请号：US17683768

申请日：2022-03-01

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi Bin Abdul Aziz ,  Sueann Wei Fen Lim ,  Jin Keong Lim

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31

Abstract: A method includes attaching semiconductor dies to die attach pads of first and second columns of the lead frame; enclosing the semiconductor dies of the respective columns in respective first and second package structures; trimming the lead frame to separate respective first and second lead portions of adjacent ones of the first and second columns of the lead frame; moving the first columns along a column direction relative to the second columns; and separating individual packaged electronic devices of the respective first and second columns from one another.

公开(公告)号：US20210005540A1

公开(公告)日：2021-01-07

申请号：US17028843

申请日：2020-09-22

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi bin Abdul Aziz ,  Wei Fen Sueann Lim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A leadframe strip for use in making leaded integrated circuit packages includes a plurality of integrally connected leadframes that each have a die attach pad and first and second dam bars located adjacent to opposite first and second sides of the die attach pad, respectively. A plurality of continuous lead structures extend, uninterrupted by other structure, between opposing ones of the dam bars of horizontally adjacent leadframes. The plurality of integrally connected leadframes are arranged in a plurality of vertical columns, wherein die attach pads in one vertical column are vertically offset from die attach pads in adjacent vertical columns.

公开(公告)号：US20170213781A1

公开(公告)日：2017-07-27

申请号：US15003238

申请日：2016-01-21

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Chong Han Lim ,  You Chye How

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L23/49537 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4839 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/49589 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/15153 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An integrated circuit (IC) package includes a first leadframe having a top surface and a bottom surface. An IC die has an active side coupled to the first leadframe bottom surface and has a back side. A second leadframe has a top surface and a bottom surface. The back side of said IC chip is coupled to the top surface of the second leadframe.

公开(公告)号：US09029194B2

公开(公告)日：2015-05-12

申请号：US14267565

申请日：2014-05-01

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi bin Abdul Aziz ,  Susan Goh Geok Ling ,  Ng Swee Tiang

IPC: H01L21/00 ,  H01L23/495 ,  H01L21/56 ,  H01L21/82 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L21/565 ,  H01L21/82 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49551 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/08245 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/73251 ,  H01L2224/80904 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/92222 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/80 ,  H01L2224/16 ,  H01L2224/08 ,  H01L2924/00

Abstract: A method of making an integrated circuit module starts with a top leadframe strip comprising a plurality of integrally connected top leadframes. A plurality of flipchip dies are mounted on the top leadframe strip with solder bumps of each flipchip bonded to predetermined pad portions on each of the top leadframes. The top leadframe strip is attached to a bottom leadframe strip. The bottom leadframe strip has a plurality of integrally connected bottom leadframes each having a central die attach pad (DAP) portion and a peripheral frame portion. A back face of each flipchip die contacts the DAP portion of each bottom leadframe. Lead portions of each top leadframe are attached to the peripheral frame portion of each bottom leadframe. The top leadframe strip is attached to the bottom leadframe strip with a back face of each flipchip die contacting the DAP portion of each bottom leadframe and with lead portions of each top leadframe attached to the peripheral frame portion of each bottom leadframe.

Abstract translation: 制造集成电路模块的方法从包括多个整体连接的顶部引线框架的顶部引线框条开始。 多个倒装芯片模具安装在顶部引线框架条上，每个倒装芯片的焊料凸块接合到每个顶部引线框架上的预定焊盘部分。 顶部引线框条连接到底部引线框条。 底部引线框带具有多个整体连接的底部引线框架，每个底部引线框架具有中央管芯附接焊盘（DAP）部分和外围框架部分。 每个倒装芯片模具的背面接触每个底部引线框架的DAP部分。 每个顶部引线框架的引线部分附接到每个底部引线框架的外围框架部分。 顶部引线框条附接到底部引线框条，每个倒装芯片模具的背面接触每个底部引线框架的DAP部分，并且每个顶部引线框架的引线部分连接到每个底部引线框架的外围框架部分。

公开(公告)号：US12087674B2

公开(公告)日：2024-09-10

申请号：US17683768

申请日：2022-03-01

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi Bin Abdul Aziz ,  Sueann Wei Fen Lim ,  Jin Keong Lim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49541 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/49513 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/73265

Abstract: A method includes attaching semiconductor dies to die attach pads of first and second columns of the lead frame; enclosing the semiconductor dies of the respective columns in respective first and second package structures; trimming the lead frame to separate respective first and second lead portions of adjacent ones of the first and second columns of the lead frame; moving the first columns along a column direction relative to the second columns; and separating individual packaged electronic devices of the respective first and second columns from one another.

公开(公告)号：US11626350B2

公开(公告)日：2023-04-11

申请号：US16839216

申请日：2020-04-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chong Han Lim ,  Lee Han Meng@Eugene Lee ,  Anis Fauzi Bin Abdul Aziz ,  Wei Fen Sueann Lim ,  Siew Kee Lee

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L21/00 ,  H01L25/075 ,  H01L21/60

Abstract: A method includes forming a leadframe assembly to have a pair of opposing sides, and having semiconductor die receiving portions extending between the opposing sides. The method also includes placing semiconductor dies on the leadframe assembly in the die receiving portions. Each die has a row of leads on each of two opposing sides of the die and a longitudinal axis parallel to the rows of leads. The longitudinal axis of each die is orthogonal to the opposing sides of the leadframe assembly. The method further includes applying mold compound to the semiconductor dies. The method includes punching through the leadframe assembly between the opposing sides using a first tool having a first tool longitudinal axis parallel to longitudinal axes of the dies.

公开(公告)号：US10115660B2

公开(公告)日：2018-10-30

申请号：US15688227

申请日：2017-08-28

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi bin Abdul Aziz ,  Wei Fen Sueann Lim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A leadframe strip for use in making leaded integrated circuit packages includes a plurality of integrally connected leadframes that each have a die attach pad and first and second dam bars located adjacent to opposite first and second sides of the die attach pad, respectively. A plurality of continuous lead structures extend, uninterrupted by other structure, between opposing ones of the dam bars of horizontally adjacent leadframes. The plurality of integrally connected leadframes are arranged in a plurality of vertical columns, wherein die attach pads in one vertical column are vertically offset from die attach pads in adjacent vertical columns.

公开(公告)号：US20140191381A1

公开(公告)日：2014-07-10

申请号：US13737697

申请日：2013-01-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Lee Han Meng@Eugene Lee ,  Anis Fauzi bin Abdul Aziz ,  Susan Goh Geok Ling ,  Ng Swee Tiang

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L21/565 ,  H01L21/82 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49551 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/08245 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/73251 ,  H01L2224/80904 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/92222 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/80 ,  H01L2224/16 ,  H01L2224/08 ,  H01L2924/00

Abstract: An integrated circuit module including a generally flat die attachment pad (DAP) positioned substantially in a first plane; and a generally flat lead bar positioned substantially in a second plane above and parallel to said first plane and having at least one downwardly and outwardly extending lead bar lead projecting therefrom and terminating substantially in the first plane; a top leadframe having a plurality of generally flat contact pads positioned substantially in a third plane above and parallel to the second plane and a plurality of leads having proximal end portions connected to the pad portions and having downwardly and outwardly extending distal end portions terminating substantially in said first plane; an IC die connected to the top leadframe, and the DAP; and encapsulation material encapsulating at least portions of the DAP, the lead bar, the top lead frame, and the IC die.

Abstract translation: 一种集成电路模块，包括基本上位于第一平面中的大致平坦的芯片附接焊盘（DAP）; 以及大致平坦的引线条，其基本上位于第二平面的上方并平行于所述第一平面，并且具有至少一个向下和向外延伸的引导杆引线，其从所述第一平面突出并终止于所述第一平面中; 顶部引线框架具有多个基本上平坦的接触焊盘，其基本上位于第三平面中并且平行于第二平面，并且多个引线具有连接到焊盘部分的近端部分，并且具有向下和向外延伸的远端部分，其基本上终止于 第一架飞机 连接到顶部引线框架的IC管芯和DAP; 以及封装材料，其封装DAP，引线条，顶部引线框架和IC管芯的至少一部分。

公开(公告)号：US20200176365A1

公开(公告)日：2020-06-04

申请号：US16782824

申请日：2020-02-05

Applicant: Texas Instruments Incorporated

Inventor： Bin Abdul Aziz Anis Fauzi ,  Wei Fen Sueann Lim ,  Lee Han Meng@Eugene Lee

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: In a described example, a packaged integrated circuit (IC) includes a lead frame with a lead and with an IC chip mount pad. A portion of the lead adjacent to the IC chip mount pad is mechanically deformed to form a lead lock. An integrated circuit chip is mounted on a first side of the IC chip mount pad; and the integrated circuit chip, the IC chip mount pad, and the portion are covered in molding compound.

公开(公告)号：US10381293B2

公开(公告)日：2019-08-13

申请号：US15003238

申请日：2016-01-21

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@Eugene Lee ,  Chong Han Lim ,  You Chye How

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/495

Abstract: An integrated circuit (IC) package includes a first leadframe having a top surface and a bottom surface. An IC die has an active side coupled to the first leadframe bottom surface and has a back side. A second leadframe has a top surface and a bottom surface. The back side of said IC chip is coupled to the top surface of the second leadframe.