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14 条记录 (耗时 0.042 秒)

    Surface preparation process for damascene copper deposition
    4.
    发明授权
    Surface preparation process for damascene copper deposition 有权
    镶嵌铜沉积的表面处理工艺

    公开(公告)号：US07998859B2

    公开(公告)日：2011-08-16

    申请号：US12238139

    申请日：2008-09-25

    申请人： Qingyun Chen ,  Xuan Lin ,  Vincent Paneccasio, Jr. ,  Richard Hurtubise ,  Joseph A. Abys

    发明人： Qingyun Chen ,  Xuan Lin ,  Vincent Paneccasio, Jr. ,  Richard Hurtubise ,  Joseph A. Abys

    IPC分类号： H01L21/00

    CPC分类号： H01L21/76873 ,  H01L21/02068 ,  H01L21/288 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76861 ,  H01L21/76874

    摘要： A method is disclosed for metallizing a substrate comprising an interconnect feature in the manufacture of a microelectronic device, wherein the interconnect feature comprises a bottom, a sidewall, and a top opening having a diameter, D. The method comprises the following steps: depositing a barrier layer on the bottom and the sidewall of the interconnect feature, the barrier layer comprising a metal selected from the group consisting of ruthenium, tungsten, tantalum, titanium, iridium, rhodium, and combinations thereof; contacting the substrate comprising the interconnect feature comprising the bottom and sidewall having the barrier layer thereon with an aqueous composition comprising a reducing agent and a surfactant; and depositing copper metal onto the bottom and the sidewall of the interconnect feature having the barrier layer thereon.

    摘要翻译： 公开了一种用于金属化包括在微电子器件的制造中的互连特征的衬底的方法，其中所述互连特征包括底部，侧壁和具有直径D的顶部开口。该方法包括以下步骤： 所述阻挡层包括选自由钌，钨，钽，钛，铱，铑及其组合组成的组的金属; 使包含所述底部和侧壁的所述基底的所述基底与所述阻挡层接触，所述水性组合物包含还原剂和表面活性剂; 以及在其上具有阻挡层的互连部件的底部和侧壁上沉积铜金属。

    Copper electrodeposition in microelectronics
    5.
    发明授权
    Copper electrodeposition in microelectronics 有权
    铜电沉积在微电子学

    公开(公告)号：US07815786B2

    公开(公告)日：2010-10-19

    申请号：US11846385

    申请日：2007-08-28

    申请人： Vincent Paneccasio, Jr. ,  Xuan Lin ,  Paul Figura ,  Richard Hurtubise

    发明人： Vincent Paneccasio, Jr. ,  Xuan Lin ,  Paul Figura ,  Richard Hurtubise

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/2885 ,  C25D3/38 ,  C25D7/12 ,  C25D7/123 ,  H01L21/76877

    摘要： An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.

    摘要翻译： 一种用于在具有亚微米尺寸互连特征的半导体集成电路基板上电解电镀Cu的电解电镀方法和组合物。 该组合物包含Cu离子源和包含聚醚基团的抑制剂化合物。 该方法包括以超填充速度的快速自下而上沉积来超填充，通过其从特征的底部到特征的顶部开口的垂直方向上的Cu沉积基本上大于侧壁上的Cu沉积。

    Method and composition for electrodeposition of copper in microelectronics with dipyridyl-based levelers
    7.
    发明授权
    Method and composition for electrodeposition of copper in microelectronics with dipyridyl-based levelers 有权
    用基于二吡啶基的矫直剂在微电子学中电沉积铜的方法和组合物

    公开(公告)号：US08388824B2

    公开(公告)日：2013-03-05

    申请号：US12324335

    申请日：2008-11-26

    申请人： Vincent Paneccasio, Jr. ,  Xuan Lin ,  Richard Hurtubise ,  Qingyun Chen

    发明人： Vincent Paneccasio, Jr. ,  Xuan Lin ,  Richard Hurtubise ,  Qingyun Chen

    IPC分类号： C25D5/02 ,  C25D3/38 ,  H05K3/42

    CPC分类号： H01L21/76879 ,  C25D3/38 ,  C25D5/02 ,  C25D7/12 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/76877 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for metallizing a via feature in a semiconductor integrated circuit device substrate, wherein the semiconductor integrated circuit device substrate comprises a front surface, a back surface, and the via feature and wherein the via feature comprises an opening in the front surface of the substrate, a sidewall extending from the front surface of the substrate inward, and a bottom. The method comprises contacting the semiconductor integrated circuit device substrate with an electrolytic copper deposition chemistry comprising (a) a source of copper ions and (b) a leveler compound, wherein the leveler compound is a reaction product of a dipyridyl compound and an alkylating agent; and supplying electrical current to the electrolytic deposition chemistry to deposit copper metal onto the bottom and sidewall of the via feature, thereby yielding a copper filled via feature.

    摘要翻译： 一种用于金属化半导体集成电路器件衬底中的通孔特征的方法，其中所述半导体集成电路器件衬底包括前表面，后表面和所述通孔特征，并且其中所述通孔特征包括在所述衬底的前表面中的开口 ，从基板的前表面向内延伸的侧壁和底部。 该方法包括使半导体集成电路器件衬底与包含（a）铜离子源和（b）整平剂化合物的电解铜沉积化学物质接触，其中矫光剂化合物是二吡啶基化合物和烷基化剂的反应产物; 并向电解沉积化学物质提供电流以将铜金属沉积到通孔特征的底部和侧壁上，从而产生铜填充的通孔特征。

    Coatings for EMI/RFI shielding
    9.
    发明授权
    Coatings for EMI/RFI shielding 失效
    EMI / RFI屏蔽涂层

    公开(公告)号：US6013203A

    公开(公告)日：2000-01-11

    申请号：US136219

    申请日：1998-08-19

    申请人： Vincent Paneccasio, Jr. ,  Mark P. Chasse

    发明人： Vincent Paneccasio, Jr. ,  Mark P. Chasse

    IPC分类号： C09D5/24 ,  H01B1/22 ,  H05K1/09 ,  H05K9/00

    CPC分类号： H05K9/0092 ,  C09D5/24 ,  H01B1/22 ,  H05K1/095

    摘要： An electrically conductive paint for providing EMI/RFI shielding for housings of electronics components comprises a cross-linked organic resin binder containing cross-linkable functional groups such as OH groups, electrically conductive metallic particles, preferably a mixture of silver flakes and silver-coated copper flakes, a solvent, a cross-linking agent which cross-links with itself and with the functional groups of the organic binder and preferably a catalyst which accelerates cross-linking of the cross-linking agent and organic binder. Using such a paint formulation it has been found that thinner coatings can be used while still exceeding the properties needed for EMI/RFI shielding of housing for electronic components. A rheological additive which is an organic derivative of castor oil is preferably used to control the viscosity and spraying characteristics of the paint especially in a paint composition containing silver coated copper flakes. The conductive paint provides a sprayed coating which is durable, has low resistivity and is smooth and has both cohesive and adhesive strength. A method is also provided for forming EMI/RFI shielding on housings for electronic components and electronic components made using the method and paint composition of the invention.

    摘要翻译： 用于为电子部件的壳体提供EMI / RFI屏蔽的导电涂料包括含有可交联官能团如OH基团的交联有机树脂粘合剂，导电金属颗粒，优选银薄片和银涂层铜的混合物 薄片，溶剂，与其自身和有机粘合剂的官能团交联的交联剂，优选加速交联剂和有机粘合剂的交联的催化剂。 已经发现使用这种涂料配方，可以使用更薄的涂层，同时仍然超过用于电子部件的外壳的EMI / RFI屏蔽所需的性能。 作为蓖麻油的有机衍生物的流变添加剂优选用于控制涂料的粘度和喷涂特性，特别是在含有银涂布的铜薄片的涂料组合物中。 导电涂料提供耐用的，具有低电阻率并且光滑并且具有粘结和粘合强度的喷涂。 还提供了一种用于在使用本发明的方法和涂料组合物制造的电子部件和电子部件的壳体上形成EMI / RFI屏蔽的方法。