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公开(公告)号：US11133194B2
公开(公告)日：2021-09-28
申请号：US16796675
申请日：2020-02-20
IPC分类号： H01L21/02 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L29/423 , H01L29/786
摘要： A method of etching a substrate includes generating plasma comprising a first concentration of an etchant and a second concentration of an inhibitor and etching the substrate by exposing an exposed interface between a first material and a second material to the plasma. The first material includes a lower reactivity to both the etchant and the inhibitor than the second material. The first concentration is less than the second concentration. Etching the substrate includes etching the first material and the second material at the exposed interface to form an etched indentation including an enriched region of the second material, forming a passivation layer at the enriched region using the inhibitor, and etching the first material at the etched indentation. The passivation layer reduces an etch rate of the second material to a reduced rate that is less than an etch rate of the first material.
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公开(公告)号：US20180082903A1
公开(公告)日：2018-03-22
申请号：US15708319
申请日：2017-09-19
IPC分类号： H01L21/8234 , H01L21/3065 , H01L21/02 , H01L21/66 , H01L21/67
CPC分类号： H01L21/823431 , H01J37/32935 , H01J2237/334 , H01L21/02057 , H01L21/3065 , H01L21/67069 , H01L21/67253 , H01L22/12 , H01L22/26 , H01L29/66795
摘要： Provided is a method of patterning structures on a substrate using an integration scheme in a patterning system, the method comprising: disposing a substrate in a processing chamber, the substrate having a plurality of structures and a pattern, the substrate including an underlying layer and a target layer, at least one structure intersecting with another structure, each intersection having an intersection angle and a corner, the integration scheme requiring a vertical corner profile at each intersection; alternatingly and sequentially etching and cleaning the substrate to transfer the pattern onto the target layer and to achieve a target vertical corner profile at each intersection; controlling selected two or more operating variables of the integration scheme in the alternating and sequential etching and cleaning operations in order to achieve target integration objectives.
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公开(公告)号：US20200266070A1
公开(公告)日：2020-08-20
申请号：US16796675
申请日：2020-02-20
IPC分类号： H01L21/3065 , H01L21/02
摘要： A method of etching a substrate includes generating plasma comprising a first concentration of an etchant and a second concentration of an inhibitor and etching the substrate by exposing an exposed interface between a first material and a second material to the plasma. The first material includes a lower reactivity to both the etchant and the inhibitor than the second material. The first concentration is less than the second concentration. Etching the substrate includes etching the first material and the second material at the exposed interface to form an etched indentation including an enriched region of the second material, forming a passivation layer at the enriched region using the inhibitor, and etching the first material at the etched indentation. The passivation layer reduces an etch rate of the second material to a reduced rate that is less than an etch rate of the first material.
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公开(公告)号：US10529589B2
公开(公告)日：2020-01-07
申请号：US15995173
申请日：2018-06-01
发明人： Erdinc Karakas , Li Wang , Andrew Nolan , Christopher Talone , Shyam Sridhar , Alok Ranjan , Hiroto Ohtake
IPC分类号： H01L21/3213 , H01L21/311 , H01L21/3065 , H01L21/033 , H01L21/027
摘要： A method of etching is described. The method providing a substrate having a first material composed of silicon-containing organic material and a second material that is different from the first material, forming a chemical mixture by plasma-excitation of a process gas containing SF6 and an optional inert gas, controlling a processing pressure at or above 100 mtorr, and exposing the first material on the substrate to the chemical mixture to selectively etch the first material relative to the second material.
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公开(公告)号：US11699741B2
公开(公告)日：2023-07-11
申请号：US17336043
申请日：2021-06-01
IPC分类号： H01L29/66 , H01L21/8234 , H01L29/78 , H01L29/06 , H01L21/311 , H01L21/3213 , H01L21/285 , H01L21/02 , H01L29/786
CPC分类号： H01L29/6656 , H01L21/823431 , H01L21/823468 , H01L29/6653 , H01L29/66545 , H01L29/66553 , H01L29/66742 , H01L29/785 , H01L21/0228 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/28556 , H01L21/31122 , H01L21/32135 , H01L29/0653 , H01L29/78696
摘要： In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.
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公开(公告)号：US10903077B2
公开(公告)日：2021-01-26
申请号：US16511745
申请日：2019-07-15
IPC分类号： H01L21/00 , H01L29/00 , H01L21/033 , H01L29/161 , H01L29/06 , H01L21/8234 , H01L21/02 , H01L29/66
摘要： Embodiments are described herein that form silicon germanium nano-wires while reducing or eliminating erosion of nitride layers (e.g., masks and spacers) caused during selective etching of silicon with respect to silicon germanium during formation of silicon germanium nano-wires. oxide layers are used to protect nitride layers during formation of silicon germanium (SiGe) nano-wires. In particular, multilayer spacers including oxide/nitride/oxide layers are formed to protect the nitride layers during selective silicon etch processes that are used to form silicon germanium nano-wires, for example, for field effect transistors (FETs). The multilayer spacers allow for target levels of erosion to be achieved for the nitride layers.
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公开(公告)号：US20200273992A1
公开(公告)日：2020-08-27
申请号：US16782680
申请日：2020-02-05
发明人： Sergey Voronin , Christopher Catano , Sang Cheol Han , Shyam Sridhar , Yusuke Yoshida , Christopher Talone , Alok Ranjan
IPC分类号： H01L29/78 , H01L21/3213 , H01L21/02 , H01L21/3065
摘要： Residue at the base of a feature in a substrate to be etched is limited so that improved profiles may be obtained when forming vertical, narrow pitch, high aspect ratio features, for example fin field effect transistor (FinFET) gates. A thin bottom layer of the feature is formed of a different material than the main layer of the feature. The bottom material may be comprised of a material that preferentially etches and/or preferentially oxidizes as compared to the main layer. The bottom layer may comprise silicon germanium. The preferential etching characteristics may provide a process in which un-etched residuals do not remain. Even if residuals remain, after etch of the feature, an oxidation process may be performed. Enhanced oxidation rates of the bottom material allow any remaining residual to be oxidized. Plasma oxidation may be used. The oxidized material may then be removed by utilizing standard oxide removal mechanisms.
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公开(公告)号：US20190080926A1
公开(公告)日：2019-03-14
申请号：US16128001
申请日：2018-09-11
IPC分类号： H01L21/311 , H01L21/02 , H01L21/67
摘要： Provided is a method of modifying a surface of a substrate for improved etch selectivity of nitride etching. In an embodiment, the method includes providing a substrate with a nitride-containing structure, the nitride-containing structure having an oxygen-nitrogen layer. The method may also include performing a surface modification process on the nitride-containing structure with the oxygen-nitrogen layer using one or more gases, the surface modification process generating a cleaned nitride-containing structure. Additionally, the method may include performing a nitride etch process using the cleaned nitride-containing structure, wherein the etched nitride-containing structure are included in 5 nm or lower technology nodes, and the nitride etch process meets target etch rate and target etch selectivity, and the cleaned nitride-containing structure meet target residue cleaning objectives.
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公开(公告)号：US20220384607A1
公开(公告)日：2022-12-01
申请号：US17336043
申请日：2021-06-01
IPC分类号： H01L29/66
摘要： In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.
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公开(公告)号：US10811273B2
公开(公告)日：2020-10-20
申请号：US16128001
申请日：2018-09-11
IPC分类号： H01L21/311 , H01L21/3213 , H01L21/3105 , H01L21/306 , H01L21/3065 , H01L21/67 , H01L21/02
摘要： Provided is a method of modifying a surface of a substrate for improved etch selectivity of nitride etching. In an embodiment, the method includes providing a substrate with a nitride-containing structure, the nitride-containing structure having an oxygen-nitrogen layer. The method may also include performing a surface modification process on the nitride-containing structure with the oxygen-nitrogen layer using one or more gases, the surface modification process generating a cleaned nitride-containing structure. Additionally, the method may include performing a nitride etch process using the cleaned nitride-containing structure, wherein the etched nitride-containing structure are included in 5 nm or lower technology nodes, and the nitride etch process meets target etch rate and target etch selectivity, and the cleaned nitride-containing structure meet target residue cleaning objectives.
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