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公开(公告)号:US20170278705A1
公开(公告)日:2017-09-28
申请号:US15466264
申请日:2017-03-22
Applicant: TOKYO ELECTRON LIMITED
Inventor: Hiroki MURAKAMI , Daisuke SUZUKI , Takahiro MIYAHARA
IPC: H01L21/02 , C23C16/455 , C23C16/46 , C23C16/34
CPC classification number: H01L21/02312 , C23C16/02 , C23C16/04 , C23C16/345 , C23C16/45525 , C23C16/45544 , C23C16/46 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/0228 , H01L21/76897
Abstract: There is provided a nitride film forming method which includes: performing a pretreatment in which a chlorine-containing gas is supplied while heating a substrate to be processed having a first base film and a second base film formed on the substrate to a predetermined temperature, and is adsorbed onto a surface of the first base film and a surface of the second base film; and forming a nitride film on the first base film and the second base film subjected to the pretreatment, by an ALD method or a CVD method, using a raw material gas and a nitriding gas, while heating the substrate to be processed to a predetermined temperature.
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公开(公告)号:US20160240618A1
公开(公告)日:2016-08-18
申请号:US15041144
申请日:2016-02-11
Applicant: TOKYO ELECTRON LIMITED
Inventor: Youichirou CHIBA , Takumi YAMADA , Daisuke SUZUKI
IPC: H01L29/40 , H01L21/306 , H01L21/67 , H01L21/02
CPC classification number: H01L29/401 , C30B25/00 , H01L21/223 , H01L21/32055 , H01L21/32135 , H01L21/32155 , H01L21/3247
Abstract: A method of filling a depression of a workpiece is provided. The depression passes through an insulating film and extends up to an inside of a semiconductor substrate. The method includes forming a first thin film made of a semiconductor material along a wall surface which defines the depression, performing gas phase doping on the first thin film, by annealing the workpiece within a vessel, forming an epitaxial region from the semiconductor material of the first thin film along a surface of the semiconductor substrate which defines the depression, without moving the first thin film with the gas phase doping performed, forming a second thin film made of a semiconductor material along the wall surface which defines the depression; and by annealing the workpiece within the vessel, further forming an epitaxial region from the semiconductor material of the second thin film moved toward a bottom of the depression.
Abstract translation: 提供了填充工件的凹陷的方法。 凹陷通过绝缘膜并延伸到半导体衬底的内部。 该方法包括沿着限定凹陷的壁表面形成由半导体材料制成的第一薄膜,通过在容器内退火工件,在第一薄膜上进行气相掺杂,从所述半导体材料形成外延区域 沿着所述半导体衬底的限定所述凹陷的表面的第一薄膜,而不进行气相掺杂而移动所述第一薄膜,沿着限定所述凹陷的所述壁表面形成由半导体材料制成的第二薄膜; 并且通过在容器内退火工件,进一步从第二薄膜的半导体材料形成外延区域,该半导体材料向凹陷部的底部移动。
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公开(公告)号:US20160240379A1
公开(公告)日:2016-08-18
申请号:US15018949
申请日:2016-02-09
Applicant: TOKYO ELECTRON LIMITED
Inventor: Youichirou CHIBA , Hiroki IRIUDA , Daisuke SUZUKI
CPC classification number: C30B1/023 , H01L21/2252 , H01L21/3247
Abstract: A method of filling a depression of a workpiece is provided. The method includes forming a first thin film made of a semiconductor material substantially not containing an impurity along a wall surface which defines the depression, forming an epitaxial region conforming to crystals of the semiconductor substrate from the semiconductor material of the first thin film moved toward a bottom of the depression by annealing, etching the first thin film remaining on the wall surface, performing gas phase doping upon the epitaxial region, forming a second thin film made of a semiconductor material substantially not containing an impurity along the wall surface, further forming an epitaxial region from the semiconductor material of the second thin film moved toward the bottom of the depression by annealing, and performing gas phase doping upon the second thin film remaining on the wall surface and the epitaxial region.
Abstract translation: 提供了填充工件的凹陷的方法。 该方法包括:形成由沿着限定凹陷的壁表面基本上不含有杂质的半导体材料制成的第一薄膜,从第一薄膜的半导体材料形成符合半导体衬底的晶体的外延区域, 通过退火蚀刻凹陷的底部,蚀刻保留在壁表面上的第一薄膜,对外延区进行气相掺杂,形成由沿着壁表面基本上不含杂质的半导体材料制成的第二薄膜,进一步形成 从第二薄膜的半导体材料的外延区域通过退火向凹陷的底部移动,并且对保留在壁表面和外延区域上的第二薄膜进行气相掺杂。
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公开(公告)号:US20250079171A1
公开(公告)日:2025-03-06
申请号:US18816114
申请日:2024-08-27
Applicant: Tokyo Electron Limited
Inventor: Tatsuya MIYAHARA , Daisuke SUZUKI , Yoshihiro TAKEZAWA
Abstract: A substrate-processing method includes: preparing a substrate including an undoped silicon film and a phosphorus-doped silicon film, at least the phosphorus-doped silicon film being exposed on a surface of the substrate; and supplying a halogen gas to the substrate, and, from among the undoped silicon film the phosphorus-doped silicon film, etching and removing the phosphorus-doped silicon film selectively.
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公开(公告)号:US20220364228A1
公开(公告)日:2022-11-17
申请号:US17753004
申请日:2020-08-06
Applicant: Tokyo Electron Limited
Inventor: Yoshihiro TAKEZAWA , Daisuke SUZUKI , Hiroyuki HAYASHI , Tatsuya MIYAHARA , Keisuke FUJITA , Masami OIKAWA , Sena FUJITA
Abstract: A cleaning method according to an aspect of the present disclosure includes: supplying a halogen-containing gas that does not contain fluorine to an interior of a processing container that is capable of being exhausted via an exhaust pipe to perform a cleaning; and supplying a fluorine-containing gas to at least one of the interior of the processing container and an interior of the exhaust pipe to perform the cleaning after the supplying the halogen-containing gas to perform the cleaning.
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公开(公告)号:US20150187643A1
公开(公告)日:2015-07-02
申请号:US14582243
申请日:2014-12-24
Applicant: TOKYO ELECTRON LIMITED
Inventor: Akinobu KAKIMOTO , Youichirou CHIBA , Takumi YAMADA , Daisuke SUZUKI
IPC: H01L21/768 , H01L21/67 , C30B25/16 , H01L21/285
CPC classification number: H01L21/76877 , C30B1/023 , C30B25/00 , C30B29/06 , H01L21/02667 , H01L21/28525 , H01L21/28531 , H01L21/67109 , H01L21/76879
Abstract: A depression filling method for filling a depression of a workpiece including a semiconductor substrate and an insulating film formed on the semiconductor substrate includes: forming an impurity-doped first semiconductor layer along a wall surface which defines the depression; forming, on the first semiconductor layer, a second semiconductor layer which is lower in impurity concentration than the first semiconductor layer and which is smaller in thickness than the first semiconductor layer; annealing the workpiece to form an epitaxial region at the bottom of the depression corresponding to crystals of the semiconductor substrate from the first semiconductor layer and the second semiconductor layer; and etching the first amorphous semiconductor region and the second amorphous semiconductor region.
Abstract translation: 用于填充包括形成在半导体衬底上的半导体衬底和绝缘膜的工件的凹陷的凹陷填充方法包括:沿着限定凹陷的壁表面形成杂质掺杂的第一半导体层; 在所述第一半导体层上形成杂质浓度低于所述第一半导体层且厚度小于所述第一半导体层的第二半导体层; 对所述工件退火以在所述凹部的底部形成与所述第一半导体层和所述第二半导体层对应于所述半导体衬底的晶体的外延区域; 并蚀刻第一非晶半导体区域和第二非晶半导体区域。
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公开(公告)号:US20240328033A1
公开(公告)日:2024-10-03
申请号:US18609525
申请日:2024-03-19
Applicant: Tokyo Electron Limited
Inventor: Tuhin Shuvra BASU , Hiroto FUJIKAWA , Keita KUMAGAI , Yoshihiro TAKEZAWA , Daisuke SUZUKI
IPC: C30B29/06
CPC classification number: C30B29/06
Abstract: A film forming method for forming a silicon film on a substrate, includes supplying a silane-based gas and a termination gas to the substrate during a period. The termination gas includes an element having an electronegativity lower than an electronegativity of hydrogen, and the supplying includes terminating a dangling bond of silicon in the silicon film with the element.
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公开(公告)号:US20220319846A1
公开(公告)日:2022-10-06
申请号:US17655247
申请日:2022-03-17
Applicant: Tokyo Electron Limited
Inventor: Tatsuya MIYAHARA , Daisuke SUZUKI , Yoshihiro TAKEZAWA , Yuki TANABE
Abstract: A method of crystallizing an amorphous silicon film includes depositing the amorphous silicon film on a seed layer formed over a substrate while heating the amorphous silicon film at a first temperature, and forming a crystal nucleus in an outer layer of the amorphous silicon film by causing migration of silicon in the outer layer by heating the amorphous silicon film at a second temperature higher than the first temperature.
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公开(公告)号:US20210202248A1
公开(公告)日:2021-07-01
申请号:US17132656
申请日:2020-12-23
Applicant: Tokyo Electron Limited
Inventor: Yoshihiro TAKEZAWA , Daisuke SUZUKI , Hiroyuki HAYASHI , Yutaka MOTOYAMA
IPC: H01L21/02
Abstract: A film forming method includes: forming a laminated film, in which an interface layer, a bulk layer, and a surface layer are laminated in this order, on a base; and crystallizing the laminated film, wherein the bulk layer is formed of a film that is easier to crystallize than the interface layer in crystallizing the laminated film, and wherein the surface layer is formed of a film that is easier to crystallize than the bulk layer in crystallizing the laminated film.
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公开(公告)号:US20140349468A1
公开(公告)日:2014-11-27
申请号:US14285874
申请日:2014-05-23
Applicant: TOKYO ELECTRON LIMITED
Inventor: Daisuke SUZUKI , Kazuya TAKAHASHI , Mitsuhiro OKADA , Katsuhiko KOMORI , Satoshi ONODERA
IPC: H01L21/02
CPC classification number: H01L21/02532 , H01L21/0245 , H01L21/02502 , H01L21/02592 , H01L21/02645 , H01L21/02667
Abstract: The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed.
Abstract translation: 本公开提供了一种用于填充形成在工件的绝缘膜上的沟槽的方法。 该方法包括在限定沟槽的壁表面上形成第一含杂质的非晶硅膜,在第一非晶硅膜上形成第二非晶硅膜,并在形成第二非晶硅膜之后退火工件。
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