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1.发明授权Capacitor having collectors with separate regions between innermost and outermost circumferences of a wound element 失效电容器具有在伤口元件的最内周和最外周之间具有分开区域的收集器公开(公告)号：US08045320B2
公开(公告)日：2011-10-25
申请号：US12088755
申请日：2007-10-02
申请人： Toshitaka Hibi , Toshiyuki Kitagawa
发明人： Toshitaka Hibi , Toshiyuki Kitagawa
摘要： A capacitor includes a wound element, and externally take-out electrode members corresponding respectively to a first pole and a second pole and connected to each one of end faces of the wound element. This capacitor features that the wound element is positively fixed to the externally take-out electrode members, and has advantageously a small internal resistance. Collectors in inner circumference region of the wound element are bent in an opposite direction to a core of a winding shaft, and collectors in an outer circumference region are bent toward the core of the winding shaft. End faces of these collectors are connected to a lid, thereby forming a first pole of the capacitor, and end faces of those collectors are connected to a housing, thereby forming a second pole of the capacitor.
摘要翻译： 电容器包括卷绕元件和分别对应于第一极和第二极的外部引出电极部件，并连接到绕线元件的每个端面。 该电容器的特征在于，绕线元件被正确地固定到外部取出电极构件，并且有利地具有小的内部电阻。 缠绕元件的内周区域的收集器沿着与卷绕轴的芯部相反的方向弯曲，并且外周区域中的集电体朝向卷绕轴的芯部弯曲。 这些集电体的端面连接到盖子，从而形成电容器的第一极，并且这些集电体的端面连接到壳体，从而形成电容器的第二极点。
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公开(公告)号：US08310809B2
公开(公告)日：2012-11-13
申请号：US12161744
申请日：2007-03-12
申请人： Toshiyuki Kitagawa , Toshitaka Hibi , Kouji Tsuyuki , Sayori Hirose , Toshiharu Hirata , Keiko Hashimoto
发明人： Toshiyuki Kitagawa , Toshitaka Hibi , Kouji Tsuyuki , Sayori Hirose , Toshiharu Hirata , Keiko Hashimoto
IPC分类号： H01G9/00
CPC分类号： H01G9/06 , H01G9/016 , H01G9/08 , H01G9/155 , H01G11/74 , H01G11/80 , H01G11/82 , Y02E60/13 , Y10T29/417
摘要： An electric double-layer capacitor includes a cylindrical case having a bottom, a side surface, and an opening, a capacitor element accommodated in the case, the capacitor element, a driving electrolyte accommodated in the case, and a terminal plate provided at the opening of the case. The capacitor element includes a first electrode and a second electrode extending in a direction opposite to the first electrode. The second electrode is joined to the bottom of the case. The first and second electrodes are tilted away from the center axis of the capacitor element. In this electric double-layer capacitor, electrodes of the capacitor element are connected to the case and sealing plate reliably.
摘要翻译： 电双层电容器包括具有底部，侧面和开口的圆筒形壳体，容纳在壳体中的电容器元件，电容器元件，容纳在壳体中的驱动电解质，以及设置在开口处的端子板 的情况。 电容器元件包括沿与第一电极相反的方向延伸的第一电极和第二电极。 第二电极连接到壳体的底部。 第一和第二电极远离电容器元件的中心轴线倾斜。 在这种双电层电容器中，电容器元件的电极可靠地连接到壳体和密封板。
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公开(公告)号：US20090279231A1
公开(公告)日：2009-11-12
申请号：US12088755
申请日：2007-10-02
申请人： Toshitaka Hibi , Toshiyuki Kitagawa
发明人： Toshitaka Hibi , Toshiyuki Kitagawa
摘要： A capacitor includes a wound element, and externally take-out electrode members corresponding respectively to a first pole and a second pole and connected to each one of end faces of the wound element. This capacitor features that the wound element is positively fixed to the externally take-out electrode members, and has advantageously a small internal resistance. Collectors in inner circumference region of the wound element are bent in an opposite direction to a core of a winding shaft, and collectors in an outer circumference region are bent toward the core of the winding shaft. End faces of these collectors are connected to a lid, thereby forming a first pole of the capacitor, and end faces of those collectors are connected to a housing, thereby forming a second pole of the capacitor.
摘要翻译： 电容器包括卷绕元件和分别对应于第一极和第二极的外部引出电极部件，并连接到绕线元件的每个端面。 该电容器的特征在于，绕线元件被正确地固定到外部取出电极构件，并且有利地具有小的内部电阻。 缠绕元件的内周区域的收集器沿着与卷绕轴的芯部相反的方向弯曲，并且外周区域中的集电体朝向卷绕轴的芯部弯曲。 这些集电体的端面连接到盖子，从而形成电容器的第一极，并且这些集电体的端面连接到壳体，从而形成电容器的第二极点。
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公开(公告)号：US20100226068A1
公开(公告)日：2010-09-09
申请号：US12161744
申请日：2006-03-12
申请人： Toshiyuki Kitagawa , Toshitaka Hibi , Kouji Tsuyuki , Sayori Hirose , Toshiharu Hirata , Keiko Hashimoto
发明人： Toshiyuki Kitagawa , Toshitaka Hibi , Kouji Tsuyuki , Sayori Hirose , Toshiharu Hirata , Keiko Hashimoto
IPC分类号： H01G9/155
摘要： An electric double-layer capacitor includes a cylindrical case having a bottom, a side surface, and an opening, a capacitor element accommodated in the case, the capacitor element, a driving electrolyte accommodated in the case, and a terminal plate provided at the opening of the case. The capacitor element includes a first electrode and a second electrode extending in a direction opposite to the first electrode. The second electrode is joined to the bottom of the case. The first and second electrodes are tilted away from the center axis of the capacitor element. In this electric double-layer capacitor, electrodes of the capacitor element are connected to the case and sealing plate reliably.
摘要翻译： 电双层电容器包括具有底部，侧面和开口的圆筒形壳体，容纳在壳体中的电容器元件，电容器元件，容纳在壳体中的驱动电解质，以及设置在开口处的端子板 的情况。 电容器元件包括沿与第一电极相反的方向延伸的第一电极和第二电极。 第二电极连接到壳体的底部。 第一和第二电极远离电容器元件的中心轴线倾斜。 在这种双电层电容器中，电容器元件的电极可靠地连接到壳体和密封板。
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公开(公告)号：US08537526B2
公开(公告)日：2013-09-17
申请号：US12537866
申请日：2009-08-07
摘要： A capacitor includes a capacitor element, a bottomed, cylindrical, metallic case, a metallic terminal plate, and a sealing rubber. A flange is provided along the outer circumference of the terminal plate. The flange is brought into contact with the bottom face of the sealing rubber for positioning. The case is wrung from the outside thereof so as to compress the sealing rubber. The sealing rubber has at least one of a ring-shaped top projection wall projecting between the metallic case and the terminal plate on the top face thereof, and a ring-shaped bottom projection wall projecting between the metallic case and the flange on the bottom face thereof.
摘要翻译： 电容器包括电容器元件，有底圆柱形金属外壳，金属端子板和密封橡胶。 沿端子板的外周设有凸缘。 凸缘与密封橡胶的底面接触以进行定位。 从外部将外壳拧紧以压缩密封橡胶。 密封橡胶具有在金属壳体与顶板之间的端子板之间突出的环状顶部突出壁中的至少一个，并且在底面上突出于金属壳体与凸缘之间的环形底部突出壁 其中。
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公开(公告)号：US06358817B1
公开(公告)日：2002-03-19
申请号：US09205133
申请日：1998-12-03
申请人： Toshitaka Hibi
发明人： Toshitaka Hibi
IPC分类号： H01L2176
CPC分类号： H01L27/10876 , H01L27/10814 , H01L27/10823
摘要： A semiconductor storage unit and a method of manufacturing the same are provided. In the semiconductor storage unit, the formation of a gate electrode within a semiconductor substrate decreases the occurrence of a short circuit between conductive layers, provides an excellent electric connection in a connection hole between the semiconductor substrate and a conductive layers, and also reduces the number of manufacturing processes. In a semiconductor substrate, unit memory cells and are formed by providing a gate electrode in a region where a second opening is formed in a first opening, a first impurity-diffusion layer, a second impurity-diffusion layer, a third impurity-diffusion layer, a bit line, a charge-storage electrode, a capacity insulating film, and a plate electrode. Regions where the second opening is not formed are isolation regions and between memory cells. Consequently, a short circuit between the gate electrode and the other conductive layers does not occur easily and connection holes and can be made shallower, thus obtaining an excellent electric connection inside the connection holes.
摘要翻译： 提供半导体存储单元及其制造方法。 在半导体存储单元中，半导体衬底内的栅电极的形成减少了导电层之间的短路的发生，在半导体衬底和导电层之间的连接孔中提供了优异的电连接，并且还减少了数量 的制造工艺。 在半导体衬底中，单元存储单元是通过在第一开口中形成有第二开口的区域中设置栅电极而形成的，第一杂质扩散层，第二杂质扩散层，第三杂质扩散层 ，位线，电荷存储电极，电容绝缘膜和平板电极。 不形成第二开口的区域是隔离区域和存储单元之间。 因此，栅电极和其它导电层之间的短路不容易发生，并且连接孔可以变得更浅，从而在连接孔内部获得优异的电连接。
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公开(公告)号：US06492665B1
公开(公告)日：2002-12-10
申请号：US09714130
申请日：2000-11-17
申请人： Susumu Akamatsu , Toshitaka Hibi , Takehiko Ueda , Tadami Shimizu , Yoshiaki Kato , Tatsuya Obata , Toyoyuki Shimazaki
发明人： Susumu Akamatsu , Toshitaka Hibi , Takehiko Ueda , Tadami Shimizu , Yoshiaki Kato , Tatsuya Obata , Toyoyuki Shimazaki
IPC分类号： H01L31072
CPC分类号： H01L29/665 , H01L21/76897 , H01L21/823475 , H01L29/1045 , H01L29/6653 , H01L29/66598 , H01L29/7833 , Y10S257/90
摘要： After a gate insulating film, a gate electrode and an on-gate protective layer have been formed in this order on an Si substrate, lightly-doped source/drain regions are formed in the substrate. First and second sidewalls are formed on the sides of the gate electrode and then heavily-doped source/drain regions are formed by implanting dopant ions using these sidewalls as a mask. After the second sidewall has been selectively removed, pocket implanted regions are formed and an overall protective film is deposited. Thereafter, an interlevel dielectric film is deposited, contact holes are formed to reach the heavily-doped source/drain regions and then plug electrodes are formed. Since the second sidewall has already been removed when the overall protective film is deposited, the gap between adjacent gate electrodes is not completely filled in. Accordingly, it is possible to provide a method for fabricating a semiconductor device contributing to device miniaturization without causing a shortcircuit between the gate electrode and a contact member.
摘要翻译： 在栅极绝缘膜之后，在Si衬底上依次形成栅电极和栅极保护层，在衬底中形成轻掺杂源极/漏极区。 第一和第二侧壁形成在栅电极的侧面上，然后通过使用这些侧壁作为掩模注入掺杂剂离子形成重掺杂的源/漏区。 在第二侧壁被选择性地去除之后，形成袋注入区域并且沉积整个保护膜。 此后，沉积层间电介质膜，形成接触孔以到达重掺杂的源/漏区，然后形成插塞电极。 由于当整个保护膜沉积时第二侧壁已经被去除，所以相邻栅电极之间的间隙没有被完全填充。因此，可以提供一种用于制造半导体器件的方法，该半导体器件有助于器件小型化而不引起短路 在栅电极和接触构件之间。
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公开(公告)号：US20090296316A1
公开(公告)日：2009-12-03
申请号：US12537866
申请日：2009-08-07
摘要： A capacitor includes a capacitor element, a bottomed, cylindrical, metallic case, a metallic terminal plate, and a sealing rubber. A flange is provided along the outer circumference of the terminal plate. The flange is brought into contact with the bottom face of the sealing rubber for positioning. The case is wrung from the outside thereof so as to compress the sealing rubber. The sealing rubber has at least one of a ring-shaped top projection wall projecting between the metallic case and the terminal plate on the top face thereof, and a ring-shaped bottom projection wall projecting between the metallic case and the flange on the bottom face thereof.
摘要翻译： 电容器包括电容器元件，有底圆柱形金属外壳，金属端子板和密封橡胶。 沿端子板的外周设有凸缘。 凸缘与密封橡胶的底面接触以进行定位。 从外部将外壳拧紧以压缩密封橡胶。 密封橡胶具有在金属壳体与顶板之间的端子板之间突出的环状顶部突出壁中的至少一个，并且在底面上突出于金属壳体与凸缘之间的环形底部突出壁 其中。
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公开(公告)号：US06180472B2
公开(公告)日：2001-01-30
申请号：US09361219
申请日：1999-07-27
申请人： Susumu Akamatsu , Toshitaka Hibi , Takehiko Ueda , Tadami Shimizu , Yoshiaki Kato , Tatsuya Obata , Toyoyuki Shimazaki
发明人： Susumu Akamatsu , Toshitaka Hibi , Takehiko Ueda , Tadami Shimizu , Yoshiaki Kato , Tatsuya Obata , Toyoyuki Shimazaki
IPC分类号： H01L21336
CPC分类号： H01L29/665 , H01L21/76897 , H01L21/823475 , H01L29/1045 , H01L29/6653 , H01L29/66598 , H01L29/7833 , Y10S257/90
摘要： After a gate insulating film, a gate electrode and an on-gate protective layer have been formed in this order on an Si substrate, lightly-doped source/drain regions are formed in the substrate. First and second sidewalls are formed on the sides of the gate electrode and then heavily-doped source/drain regions are formed by implanting dopant ions using these sidewalls as a mask. After the second sidewall has been selectively removed, pocket implanted regions are formed and an overall protective film is deposited. Thereafter, an interlevel dielectric film is deposited, contact holes are formed to reach the heavily-doped source/drain regions and then plug electrodes are formed. Since the second sidewall has already been removed when the overall protective film is deposited, the gap between adjacent gate electrodes is not completely filled in. Accordingly, it is possible to provide a method for fabricating a semiconductor device contributing to device miniaturization without causing a shortcircuit between the gate electrode and a contact member.
摘要翻译： 在栅极绝缘膜之后，在Si衬底上依次形成栅电极和栅极保护层，在衬底中形成轻掺杂源极/漏极区。 第一和第二侧壁形成在栅电极的侧面上，然后通过使用这些侧壁作为掩模注入掺杂剂离子形成重掺杂的源/漏区。 在第二侧壁被选择性地去除之后，形成袋注入区域并且沉积整个保护膜。 此后，沉积层间电介质膜，形成接触孔以到达重掺杂的源/漏区，然后形成插塞电极。 由于当整个保护膜沉积时第二侧壁已经被去除，所以相邻栅电极之间的间隙没有被完全填充。因此，可以提供一种用于制造半导体器件的方法，该半导体器件有助于器件小型化而不引起短路 在栅电极和接触构件之间。
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公开(公告)号：US06204128B1
公开(公告)日：2001-03-20
申请号：US09383418
申请日：1999-08-26
申请人： Toshitaka Hibi , Kazuo Hayama
发明人： Toshitaka Hibi , Kazuo Hayama
IPC分类号： H01L21336
CPC分类号： H01L29/66583 , H01L21/26586 , H01L21/76237 , H01L29/105 , H01L29/66492 , H01L29/66537 , H01L29/66621
摘要： A method for fabricating a semiconductor device includes the steps of: forming a doped layer of a first conductivity type within a surface region of a semiconductor substrate; forming a recess by depositing an insulating film on the semiconductor substrate and then removing at least the insulating film in a region thereof where a gate electrode is to be formed; forming a gate insulating film on the surface of the semiconductor substrate, which is exposed inside the recess; and forming the gate electrode by filling in the recess with a conductive film.
摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底的表面区域内形成第一导电类型的掺杂层; 通过在半导体衬底上沉积绝缘膜，然后在要形成栅电极的区域中至少去除绝缘膜，形成凹陷; 在所述凹部内暴露在所述半导体基板的表面上形成栅极绝缘膜; 以及通过用导电膜填充凹部来形成栅电极。
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