公开(公告)号：US07989890B2

公开(公告)日：2011-08-02

申请号：US12205961

申请日：2008-09-08

申请人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

发明人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring in the HVW and occupying a top portion of the HVW, wherein the field ring is of the first conductivity type; an insulation region over and in contact with the field ring and a portion of the HVW; a gate electrode partially over the insulation region; a drain region in the HVW, wherein the drain region is of the second conductivity type; and wherein the HVW horizontally extends further toward the drain region than the pre-HVW; and a source region adjacent to, and on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; HVW中的场环，占据HVW的顶部，其中场环是第一导电类型; 与场环和HVW的一部分接触的绝缘区域; 位于所述绝缘区域上的栅电极; 所述HVW中的漏极区域，其中所述漏极区域是所述第二导电类型; 并且其中所述HVW水平地延伸到所述漏极区域比所述预HVW; 以及与漏极区域相邻并且在与栅极电极相反的一侧的源极区域。

公开(公告)号：US08389341B2

公开(公告)日：2013-03-05

申请号：US13175246

申请日：2011-07-01

申请人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

发明人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

IPC分类号： H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring in the HVW and occupying a top portion of the HVW, wherein the field ring is of the first conductivity type; an insulation region over and in contact with the field ring and a portion of the HVW; a gate electrode partially over the insulation region; a drain region in the HVW, wherein the drain region is of the second conductivity type; and wherein the HVW horizontally extends further toward the drain region than the pre-HVW; and a source region adjacent to, and on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; HVW中的场环，占据HVW的顶部，其中场环是第一导电类型; 与场环和HVW的一部分接触的绝缘区域; 位于所述绝缘区域上的栅电极; 所述HVW中的漏极区域，其中所述漏极区域是所述第二导电类型; 并且其中所述HVW水平地延伸到所述漏极区域比所述预HVW; 以及与漏极区域相邻并且在与栅极电极相反的一侧的源极区域。

公开(公告)号：US20120003803A1

公开(公告)日：2012-01-05

申请号：US13175246

申请日：2011-07-01

申请人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

发明人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

IPC分类号： H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring in the HVW and occupying a top portion of the HVW, wherein the field ring is of the first conductivity type; an insulation region over and in contact with the field ring and a portion of the HVW; a gate electrode partially over the insulation region; a drain region in the HVW, wherein the drain region is of the second conductivity type; and wherein the HVW horizontally extends further toward the drain region than the pre-HVW; and a source region adjacent to, and on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; HVW中的场环，占据HVW的顶部，其中场环是第一导电类型; 与场环和HVW的一部分接触的绝缘区域; 位于所述绝缘区域上的栅电极; 所述HVW中的漏极区域，其中所述漏极区域是所述第二导电类型; 并且其中所述HVW水平地延伸到所述漏极区域比所述预HVW; 以及与漏极区域相邻并且在与栅极电极相反的一侧的源极区域。

公开(公告)号：US20090001462A1

公开(公告)日：2009-01-01

申请号：US12205961

申请日：2008-09-08

申请人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

发明人： Tsung-Yi Huang ,  Puo-Yu Chiang ,  Ruey-Hsin Liu ,  Shun-Liang Hsu ,  Chyi-Chyuan Huang ,  Fu-Hsin Chen ,  Eric Huang

IPC分类号： H01L29/76

CPC分类号： H01L29/0847 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring in the HVW and occupying a top portion of the HVW, wherein the field ring is of the first conductivity type; an insulation region over and in contact with the field ring and a portion of the HVW; a gate electrode partially over the insulation region; a drain region in the HVW, wherein the drain region is of the second conductivity type; and wherein the HVW horizontally extends further toward the drain region than the pre-HVW; and a source region adjacent to, and on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; HVW中的场环，占据HVW的顶部，其中场环是第一导电类型; 与场环和HVW的一部分接触的绝缘区域; 位于所述绝缘区域上的栅电极; 所述HVW中的漏极区域，其中所述漏极区域是所述第二导电类型; 并且其中所述HVW水平地延伸到所述漏极区域比所述预HVW; 以及与漏极区域相邻并且在与栅极电极相反的一侧的源极区域。

公开(公告)号：US07768071B2

公开(公告)日：2010-08-03

申请号：US12170285

申请日：2008-07-09

申请人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Puo-Yu Chiang

发明人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Puo-Yu Chiang

IPC分类号： H01L23/62

CPC分类号： H01L29/0847 ,  H01L21/266 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring of the first conductivity type occupying a top portion of the HVW; and a tunnel of the first conductivity type in the pre-HVW and the HVW, and electrically connecting the field ring and the semiconductor substrate.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; 第一导电类型的场环占据HVW的顶部; 以及预HVW和HVW中的第一导电类型的隧道，并且电场连接场环和半导体衬底。

公开(公告)号：US20100006933A1

公开(公告)日：2010-01-14

申请号：US12170285

申请日：2008-07-09

申请人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Puo-Yu Chiang

发明人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Puo-Yu Chiang

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L21/266 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring of the first conductivity type occupying a top portion of the HVW; and a tunnel of the first conductivity type in the pre-HVW and the HVW, and electrically connecting the field ring and the semiconductor substrate.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; 第一导电类型的场环占据HVW的顶部; 以及预HVW和HVW中的第一导电类型的隧道，并且电场连接场环和半导体衬底。

公开(公告)号：US07960786B2

公开(公告)日：2011-06-14

申请号：US12170246

申请日：2008-07-09

申请人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Chung-Yeh Wu

发明人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Chung-Yeh Wu

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L21/266 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring of the first conductivity type occupying a top portion of the HVW, wherein at least one of the pre-HVW, the HVW, and the field ring comprises at least two tunnels; an insulation region over the field ring and a portion of the HVW; a drain region in the HVW and adjacent the insulation region; a gate electrode over a portion the insulation region; and a source region on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; 所述第一导电类型的场环占据所述HVW的顶部部分，其中所述预HVW，所述HVW和所述场环中的至少一个包括至少两个隧道; 在场环上的绝缘区域和HVW的一部分; 在HVW中的漏极区域并且邻近绝缘区域; 绝缘区域的一部分上的栅电极; 以及栅极电极的与漏极区域相反的一侧的源极区域。

公开(公告)号：US20100006935A1

公开(公告)日：2010-01-14

申请号：US12170246

申请日：2008-07-09

申请人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Chung-Yeh Wu

发明人： Eric Huang ,  Tsung-Yi Huang ,  Fu-Hsin Chen ,  Chyi-Chyuan Huang ,  Chung-Yeh Wu

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L21/266 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor structure includes a semiconductor substrate of a first conductivity type; a pre-high-voltage well (pre-HVW) in the semiconductor substrate, wherein the pre-HVW is of a second conductivity type opposite the first conductivity type; a high-voltage well (HVW) over the pre-HVW, wherein the HVW is of the second conductivity type; a field ring of the first conductivity type occupying a top portion of the HVW, wherein at least one of the pre-HVW, the HVW, and the field ring comprises at least two tunnels; an insulation region over the field ring and a portion of the HVW; a drain region in the HVW and adjacent the insulation region; a gate electrode over a portion the insulation region; and a source region on an opposite side of the gate electrode than the drain region.

摘要翻译： 半导体结构包括第一导电类型的半导体衬底; 在所述半导体衬底中的预高压阱（预HVW），其中所述预HVW具有与所​​述第一导电类型相反的第二导电类型; 在HVW之前的高压井（HVW），其中HVW是第二导电类型; 所述第一导电类型的场环占据所述HVW的顶部部分，其中所述预HVW，所述HVW和所述场环中的至少一个包括至少两个隧道; 在场环上的绝缘区域和HVW的一部分; 在HVW中的漏极区域并且邻近绝缘区域; 绝缘区域的一部分上的栅电极; 以及栅极电极的与漏极区域相反的一侧的源极区域。

公开(公告)号：US20110163376A1

公开(公告)日：2011-07-07

申请号：US12652294

申请日：2010-01-05

申请人： Chih-Chang CHENG ,  Ruey-Hsin Liu ,  Chih-Wen Yao ,  Chia-Chin Shen ,  Eric Huang ,  Fu Chin Yang ,  Chun Lin Tsai ,  Hsiao-Chin Tuan

发明人： Chih-Chang CHENG ,  Ruey-Hsin Liu ,  Chih-Wen Yao ,  Chia-Chin Shen ,  Eric Huang ,  Fu Chin Yang ,  Chun Lin Tsai ,  Hsiao-Chin Tuan

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/088 ,  H01L24/16 ,  H01L24/48 ,  H01L29/063 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7816 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type.

摘要翻译： 高压（HV）器件包括设置在衬底中的第一掺杂剂类型的阱区。 第二掺杂剂类型的第一阱区域设置在第一掺杂剂类型的阱区域中。 隔离结构至少部分地设置在第一掺杂剂类型的阱区中。 第一栅电极设置在隔离结构和第二掺杂剂类型的第一阱区之上。 第二掺杂剂类型的第二阱区设置在第一掺杂剂类型的阱区中。 第二掺杂剂类型的第二阱区域与第二掺杂剂类型的第一阱区域间隔开。 第二栅电极设置在第二掺杂剂类型的第一阱区域和第二掺杂剂类型的第二阱区域之间和之上。

公开(公告)号：US08704312B2

公开(公告)日：2014-04-22

申请号：US12652294

申请日：2010-01-05

申请人： Chih-Chang Cheng ,  Ruey-Hsin Liu ,  Chih-Wen Yao ,  Chia-Chin Shen ,  Eric Huang ,  Fu Chin Yang ,  Chun Lin Tsai ,  Hsiao-Chin Tuan

发明人： Chih-Chang Cheng ,  Ruey-Hsin Liu ,  Chih-Wen Yao ,  Chia-Chin Shen ,  Eric Huang ,  Fu Chin Yang ,  Chun Lin Tsai ,  Hsiao-Chin Tuan

IPC分类号： H01L27/088

CPC分类号： H01L27/088 ,  H01L24/16 ,  H01L24/48 ,  H01L29/063 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7816 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type.

摘要翻译： 高压（HV）器件包括设置在衬底中的第一掺杂剂类型的阱区。 第二掺杂剂类型的第一阱区域设置在第一掺杂剂类型的阱区域中。 隔离结构至少部分地设置在第一掺杂剂类型的阱区中。 第一栅电极设置在隔离结构和第二掺杂剂类型的第一阱区之上。 第二掺杂剂类型的第二阱区设置在第一掺杂剂类型的阱区中。 第二掺杂剂类型的第二阱区域与第二掺杂剂类型的第一阱区域间隔开。 第二栅电极设置在第二掺杂剂类型的第一阱区域和第二掺杂剂类型的第二阱区域之间和之上。