PLASMA PROCESSING METHOD AND APPARATUS WITH CONTROL OF PLASMA EXCITATION POWER
    2.
    发明申请
    PLASMA PROCESSING METHOD AND APPARATUS WITH CONTROL OF PLASMA EXCITATION POWER 有权
    等离子体处理方法和控制等离子体激发能量的装置

    公开(公告)号:US20110253673A1

    公开(公告)日:2011-10-20

    申请号:US13172917

    申请日:2011-06-30

    IPC分类号: C23F1/00 C23F1/08

    摘要: The amount of RF power supplied to a plasma in a vacuum plasma processing chamber is gradually changed on a preprogrammed basis in response to signals stored in a computer memory. The computer memory stores signals so that other processing chamber parameters (pressure, gas species and gas flow rates) remain constant while the gradual change occurs. The stored signals enable rounded corners, instead of sharp edges, to be etched, e.g., at an intersection of a trench wall and base.

    摘要翻译: 响应于存储在计算机存储器中的信号,提供给真空等离子体处理室中的等离子体的RF功率的量在预编程的基础上逐渐改变。 计算机存储器存储信号,使得其他处理室参数(压力,气体种类和气体流速)在发生逐渐变化时保持恒定。 存储的信号使得能够蚀刻圆形拐角而不是锋利的边缘,例如在沟槽壁和基部的交叉处。

    Method of plasma etching organic antireflective coating
    3.
    发明授权
    Method of plasma etching organic antireflective coating 有权
    等离子体蚀刻有机抗反射涂层的方法

    公开(公告)号:US06617257B2

    公开(公告)日:2003-09-09

    申请号:US09820737

    申请日:2001-03-30

    IPC分类号: H01L21302

    摘要: A semiconductor manufacturing process wherein an organic antireflective coating is etched with an O2-free sulfur containing gas which provides selectivity with respect to an underlying layer and/or minimizes the lateral etch rate of an overlying photoresist to maintain critical dimensions defined by the photoresist. The etchant gas can include SO2 and a carrier gas such as Ar or He and optional additions of other gases such as HBr. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.

    摘要翻译: 半导体制造方法,其中用无氧的含硫气体蚀刻有机抗反射涂层,其提供相对于下层的选择性和/或最小化上覆光致抗蚀剂的横向蚀刻速率以维持由光致抗蚀剂限定的临界尺寸。 蚀刻剂气体可以包括SO 2和诸如Ar或He的载气和任选的其它气体例如HBr的添加物。 该方法对于在形成结构如镶嵌结构中蚀刻0.25微米和较小的接触或通孔开口是有用的。

    Vacuum plasma processor method
    4.
    发明授权
    Vacuum plasma processor method 失效
    真空等离子体处理器方法

    公开(公告)号:US06897156B2

    公开(公告)日:2005-05-24

    申请号:US10347363

    申请日:2003-01-21

    CPC分类号: H01J37/321

    摘要: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

    摘要翻译: 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过在腔室的顶部处的电介质窗口向等离子体提供电磁场,从而激发腔室中的可电离气体到等离子体。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。

    Vacuum plasma processor apparatus and method
    5.
    发明授权
    Vacuum plasma processor apparatus and method 有权
    真空等离子体处理装置及方法

    公开(公告)号:US06531029B1

    公开(公告)日:2003-03-11

    申请号:US09607326

    申请日:2000-06-30

    IPC分类号: H01L213065

    CPC分类号: H01J37/321

    摘要: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic; fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

    摘要翻译: 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过提供电磁而将腔室中的可电离气体激发到等离子体; 通过室顶部的电介质窗到等离子体的场。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。

    Method for improving uniformity and reducing etch rate variation of etching polysilicon
    6.
    发明授权
    Method for improving uniformity and reducing etch rate variation of etching polysilicon 有权
    改善蚀刻多晶硅的均匀性和降低蚀刻速率变化的方法

    公开(公告)号:US06514378B1

    公开(公告)日:2003-02-04

    申请号:US09540549

    申请日:2000-03-31

    IPC分类号: H05H100

    CPC分类号: H01J37/32642 H01L21/32137

    摘要: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

    摘要翻译: 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤:(a)将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上,(b)在室中保持真空,(c)通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并且激励蚀刻气体以在腔室中形成等离子体,(d)从腔室移除衬底; 并且(e)通过重复步骤(ad)连续地蚀刻腔室中的附加衬底,蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。

    Line end shortening reduction during etch
    7.
    发明授权
    Line end shortening reduction during etch 有权
    刻蚀期间线端缩短缩短

    公开(公告)号:US08668805B2

    公开(公告)日:2014-03-11

    申请号:US12165539

    申请日:2008-06-30

    IPC分类号: C23F1/00 H01L21/306

    摘要: A semiconductor device may be formed by the method comprising providing a patterned photoresist mask over the etch layer, the photoresist mask having at least one photoresist line having a pair of sidewalls ending at a line end, placing a coating over the at least one photoresist line comprising at least one cycle, wherein each cycle comprises: a) depositing a polymer layer over the photoresist line, wherein an amount of polymer at the line end is greater than an amount of polymer on the sidewalls, and b) hardening the polymer layer, and etching features into the etch layer through the photoresist mask, wherein a line end shortening (LES) is less than or equal to 1.

    摘要翻译: 半导体器件可以通过以下方法形成:包括在蚀刻层上提供经图案化的光致抗蚀剂掩模,光致抗蚀剂掩模具有至少一个光致抗蚀剂线,其具有终止于线端的一对侧壁,将涂层置于至少一个光致抗蚀剂线 包括至少一个循环,其中每个循环包括:a)在所述光致抗蚀剂线上沉积聚合物层,其中所述一端的聚合物的量大于所述侧壁上的聚合物的量,以及b)使所述聚合物层硬化, 并通过光致抗蚀剂掩模将特征蚀刻到蚀刻层中,其中线端缩短(LES)小于或等于1。

    Line end shortening reduction during etch
    8.
    发明授权
    Line end shortening reduction during etch 有权
    刻蚀期间线端缩短缩短

    公开(公告)号:US07491343B2

    公开(公告)日:2009-02-17

    申请号:US11621902

    申请日:2007-01-10

    IPC分类号: B44C1/22

    摘要: A method for etching features in an etch layer is provided. A patterned photoresist mask is provided over the etch layer, the photoresist mask having at least one photoresist line having a pair of sidewalls ending at a line end is provided. A polymer layer is placed over the at least one photoresist line, wherein a thickness of the polymer layer at the line end of the photoresist line is greater than a thickness of the polymer layer on the sidewalls of the photoresist line. Features are etched into the etch layer through the photoresist mask, wherein a line end shortening (LES) ratio is less than or equal to 1.

    摘要翻译: 提供了一种用于蚀刻蚀刻层中的特征的方法。 提供了图案化的光致抗蚀剂掩模在蚀刻层之上,光刻胶掩模具有至少一个光致抗蚀剂线,其具有在线端终止的一对侧壁。 聚合物层放置在至少一个光致抗蚀剂线之上,其中在光致抗蚀剂线的线端处的聚合物层的厚度大于光致抗蚀剂线的侧壁上的聚合物层的厚度。 通过光致抗蚀剂掩模将特征蚀刻到蚀刻层中,其中线端缩短(LES)比小于或等于1。

    Method for providing high etch rate
    9.
    发明授权
    Method for providing high etch rate 有权
    提供高蚀刻速率的方法

    公开(公告)号:US08609548B2

    公开(公告)日:2013-12-17

    申请号:US13188174

    申请日:2011-07-21

    IPC分类号: H01L21/302 H01L21/461

    摘要: A method for etching features into an etch layer in a plasma processing chamber, comprising a plurality of cycles is provided. Each cycle comprises a deposition phase and an etching phase. The deposition phase comprises providing a flow of deposition gas, forming a plasma from the deposition gas in the plasma processing chamber, providing a first bias during the deposition phase to provide an anisotropic deposition, and stopping the flow of the deposition gas into the plasma processing chamber. The etching phase, comprises providing a flow of an etch gas, forming a plasma from the etch gas in the plasma processing chamber, providing a second bias during the etch phase, wherein the first bias is greater than the second bias, and stopping the flow of the etch gas into the plasma processing chamber.

    摘要翻译: 提供了一种用于将特征蚀刻到等离子体处理室中的蚀刻层的方法,其包括多个循环。 每个循环包括沉积阶段和蚀刻阶段。 沉积阶段包括提供沉积气体流,从等离子体处理室中的沉积气体形成等离子体,在沉积阶段提供第一偏压以提供各向异性沉积,并停止沉积气体流入等离子体处理 房间。 蚀刻阶段包括提供蚀刻气体流,从等离子体处理室中的蚀刻气体形成等离子体,在蚀刻阶段期间提供第二偏压,其中第一偏压大于第二偏压,并停止流动 的蚀刻气体进入等离子体处理室。

    METHOD FOR PROVIDING HIGH ETCH RATE
    10.
    发明申请
    METHOD FOR PROVIDING HIGH ETCH RATE 有权
    提供高刻蚀速率的方法

    公开(公告)号:US20120309194A1

    公开(公告)日:2012-12-06

    申请号:US13188174

    申请日:2011-07-21

    IPC分类号: H01L21/3065

    摘要: A method for etching features into an etch layer in a plasma processing chamber, comprising a plurality of cycles is provided. Each cycle comprises a deposition phase and an etching phase. The deposition phase comprises providing a flow of deposition gas, forming a plasma from the deposition gas in the plasma processing chamber, providing a first bias during the deposition phase to provide an anisotropic deposition, and stopping the flow of the deposition gas into the plasma processing chamber. The etching phase, comprises providing a flow of an etch gas, forming a plasma from the etch gas in the plasma processing chamber, providing a second bias during the etch phase, wherein the first bias is greater than the second bias, and stopping the flow of the etch gas into the plasma processing chamber.

    摘要翻译: 提供了一种用于将特征蚀刻到等离子体处理室中的蚀刻层的方法,其包括多个循环。 每个循环包括沉积阶段和蚀刻阶段。 沉积阶段包括提供沉积气体流,从等离子体处理室中的沉积气体形成等离子体,在沉积阶段提供第一偏压以提供各向异性沉积,并停止沉积气体流入等离子体处理 房间。 蚀刻阶段包括提供蚀刻气体流,从等离子体处理室中的蚀刻气体形成等离子体,在蚀刻阶段期间提供第二偏压,其中第一偏压大于第二偏压,并停止流动 的蚀刻气体进入等离子体处理室。