公开(公告)号：US12027577B2

公开(公告)日：2024-07-02

申请号：US17351267

申请日：2021-06-18

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Shuhao Zhang ,  Zhangyi'an Yuan ,  Dican Hou ,  Bo Zhang

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/063 ,  H01L29/0878 ,  H01L29/66681 ,  H01L29/7816

Abstract: A lateral power semiconductor device includes a first type doping substrate at a bottom of the lateral power semiconductor device, a second type doping drift region, a second type heavy doping drain, a first type doping body; a first type heavy doping body contact and a second type heavy doping source, where dielectric layers are on a right side of the second type heavy doping source; the dielectric layers are arranged at intervals in a longitudinal direction in the first type doping body, and between adjacent dielectric layers in the longitudinal direction is the first type doping body; and a polysilicon is surrounded by the dielectric layer at least on a right side. Compared with conventional trench devices, the lateral power semiconductor device introduces a lateral channel, to increase a current density, thereby realizing a smaller channel on-resistance.

公开(公告)号：US20230238997A1

公开(公告)日：2023-07-27

申请号：US17873134

申请日：2022-07-25

Applicant: University of Electronic Science and Technology of China

Inventor： Bo Zhang ,  Zhongqian Niu ,  Xiaobo Yang ,  Bingli Dai ,  Yi Hu ,  Jicong Zhang ,  Yong Fan ,  Ke Liu ,  Zhi Chen

IPC: H04B1/40 ,  H03D7/16

CPC classification number: H04B1/40 ,  H03D7/165

Abstract: The present disclosure provides a GaAs monolithic integrated terahertz low-noise communication system transceiver front-end, including an intermediate frequency circuit and a terahertz circuit. The terahertz circuit includes a local oscillator frequency tripler, a local oscillator unidirectional 3 dB filter coupler, a radio frequency 180° filter coupler, and two terahertz GaAs monolithic integrated subharmonic mixers. The local oscillator unidirectional 3 dB filter coupler and the radio frequency 180° filter coupler each include one ring-cylindrical resonant cavity and four rectangular waveguides. The ring-cylindrical resonant cavity is divided into four rectangular waveguides which are correspondingly connected to the four sector-annular resonant cavities, respectively. The present disclosure suppresses the local oscillator noise by adopting a local oscillator unidirectional 3 dB filter coupler and a radio frequency 180° filter coupler with both coupling and filtering functions, thereby achieving a low local oscillator noise transceiver front-end.

公开(公告)号：US11227949B2

公开(公告)日：2022-01-18

申请号：US16877516

申请日：2020-05-19

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Longfei Liang ,  Yilei Lyu ,  Zhao Qi ,  Bo Zhang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/04

Abstract: A low specific on-resistance (Ron,sp) power semiconductor device includes a power device and a transient voltage suppressor (TVS); wherein the power device comprises a gate electrode, a drain electrode, a bulk electrode, a source electrode and a parasitic body diode, the bulk electrode and the source electrode are shorted, the TVS comprises an anode electrode and a cathode electrode, the drain electrode of the power device and the anode electrode of the TVS are connected by a first metal to form a high-voltage terminal electrode, the source electrode of the power device and the cathode electrode of the TVS are connected by a second metal to form a low-voltage terminal electrode.

公开(公告)号：US20210074699A1

公开(公告)日：2021-03-11

申请号：US16839089

申请日：2020-04-03

Applicant: University of Electronic Science and Technology of China

Inventor： Ming QIAO ,  Linrong HE ,  Yi LI ,  Chunlan LAI ,  Bo Zhang

IPC: H01L27/06 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78 ,  H01L29/739

Abstract: An integrated power semiconductor device, includes devices integrated on a single chip. The devices include a vertical high voltage device, a first high voltage pLDMOS device, a high voltage nLDMOS device, a second high voltage pLDMOS device, a low voltage NMOS device, a low voltage PMOS device, a low voltage NPN device, and a low voltage diode device. A dielectric isolation is applied to the first high voltage pLDMOS device, the high voltage nLDMOS device, the second high voltage pLDMOS device, the low voltage NMOS device, the low voltage PMOS device, the low voltage NPN device, and the low voltage diode device. A multi-channel design is applied to the first high voltage pLDMOS device, and the high voltage nLDMOS device. A single channel design is applied to the second high voltage pLDMOS device.

公开(公告)号：US10923583B2

公开(公告)日：2021-02-16

申请号：US16601609

申请日：2019-10-15

Applicant: University of Electronic Science and Technology of China

Inventor： Zehong Li ,  Xin Peng ,  Yishang Zhao ,  Min Ren ,  Bo Zhang

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423

Abstract: The present invention relates to the technical field of power semiconductor devices, particularly to an insulated gate bipolar transistor with a MOS controllable hole path. According to the present invention, a MOS controllable gate structure formed by a gate dielectric layer, a MOS control gate electrode and a P-type MOS channel region are embedded in a P+ floating p-body region of the conventional IGBT structure. The MOS region is equivalent to a switch controlled by a gate voltage. When the device is turned on under a forward voltage, the potential of the p-body region is floated to store holes, reducing the saturation conduction voltage drop of the device. Under the condition of turn-off and short-circuit, the hole extracting path is provided and the Miller capacitance is lowered, thereby lowering the turn-off losses and enhancing the short-circuit withstand capability.

公开(公告)号：US10607987B2

公开(公告)日：2020-03-31

申请号：US16255851

申请日：2019-01-24

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Song Pu ,  Bo Zhang

IPC: H01L27/06 ,  H01L21/8258 ,  H01L21/784

Abstract: A BIPOLAR-CMOS-DMOS (BCD) semiconductor device and manufacturing method, which can integrate a Junction Field-Effect Transistor (JFET), two classes of Vertical Double-diffusion Metal Oxide Semiconductor (VDMOS), a Lateral Insulated-Gate Bipolar Transistor (LIGBT) and seven kinds of Laterally Diffused Metal Oxide Semiconductor (LDMOS), a low-voltage Negative channel Metal Oxide Semiconductor (NMOS), a low-voltage Positive channel Metal Oxide Semiconductor (PMOS), a low-voltage Negative-Positive-Negative (NPN) transistor and a low-voltage Positive-Negative-Positive (PNP) transistor, and a diode in the same chip. Bipolar devices in the analog circuit, power components in the switch circuit, Complementary Metal Oxide Semiconductor (CMOS) devices in the logic circuit and other kinds of lateral and vertical components are integrated. This present invention saves costs at the same time greatly improve chip integration. The manufacturing method of the present invention is simple, and the difficulty of process is relatively less.

公开(公告)号：US10068965B1

公开(公告)日：2018-09-04

申请号：US15718001

申请日：2017-09-28

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Yang Yu ,  Wentong Zhang ,  Zhengkang Wang ,  Zhenya Zhan ,  Bo Zhang

IPC: H01L29/06 ,  H01L29/78 ,  H01L27/02 ,  H01L29/40 ,  H01L29/739 ,  H01L29/735

Abstract: The present invention relates to a lateral high-voltage device. The device includes a dielectric trench region. A doping-overlapping structure with different doping types alternating mode is provided at least below, on a left side of, or on a right side of the dielectric trench region. The device also includes a dielectric layer, a body field plate, a polysilicon gate, a gate oxide layer, a first N-type heavy doping region, a second N-type heavy doping region, a P-type heavy doping region, a P-well region, the first N-type doping pillar, the second N-type doping pillar, the third N-type doping pillar, the first P-type doping pillar, and the second P-type doping pillar. The invention adopts a dielectric trench region in the drift region to keep the breakdown voltage BV of the device while reducing the surface area of the device, and effectively reducing the device's specific On-Resistance RON,sp.

公开(公告)号：US09905682B2

公开(公告)日：2018-02-27

申请号：US15372352

申请日：2016-12-07

Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA ,  INSTITUTE OF ELECTRONIC AND INFORMATION ENGINEERING IN DONGGUAN, UESTC

Inventor： Jinping Zhang ,  Zehong Li ,  Jingxiu Liu ,  Min Ren ,  Bo Zhang ,  Zhaoji Li

IPC: H01L29/74 ,  H01L29/78 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3065 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66 ,  H01L29/747

CPC classification number: H01L29/7424 ,  H01L21/02233 ,  H01L21/26586 ,  H01L21/3065 ,  H01L29/0623 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66325 ,  H01L29/66386 ,  H01L29/7394 ,  H01L29/747 ,  H01L29/78

Abstract: A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region.

公开(公告)号：US11888022B2

公开(公告)日：2024-01-30

申请号：US17744779

申请日：2022-05-16

Applicant: University of Electronic Science and Technology of China

Inventor： Wentong Zhang ,  Ning Tang ,  Ke Zhang ,  Nailong He ,  Ming Qiao ,  Zhaoji Li ,  Bo Zhang

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/0607 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66681 ,  H01L29/7394 ,  H01L29/7823 ,  H01L29/7824

Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.

公开(公告)号：US20230238998A1

公开(公告)日：2023-07-27

申请号：US17877896

申请日：2022-07-30

Applicant: University of Electronic Science and Technology of China

Inventor： Bo Zhang ,  Zhongqian Niu ,  Xiaobo Yang ,  Bingli Dai ,  Yi Hu ,  Jicong Zhang ,  Yong Fan ,  Ke Liu ,  Zhi Chen

IPC: H04B1/40 ,  H03D7/16

CPC classification number: H04B1/40 ,  H03D7/165

Abstract: The present disclosure provides a hetero-integrated terahertz low-noise miniaturized image frequency rejection transceiver front-end, including an intermediate frequency circuit and a terahertz circuit arranged up and down, where the terahertz circuit includes a local oscillator frequency tripler, a 135° 3 dB filter coupler, a radio frequency waveguide power divider, and two quartz hetero-integrated subharmonic mixers; resonant cavities of an input unit, a first output unit, an isolation unit, and a second output unit of the 135° 3 dB filter coupler are sequentially coupled through resonant grooves to form a ring structure, a cavity length of the resonant cavity of the input unit is twice that of the resonant cavities of the other three units, and an electrical length of a waveguide of the first output unit is 45° different from that of a waveguide of the second output unit.