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公开(公告)号:US20190067184A1
公开(公告)日:2019-02-28
申请号:US16170059
申请日:2018-10-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Hung-Miao Lin , Chun-Ling Lin , Ying-Lien Chen , Huei-Ru Tsai , Sheng-Yi Su
IPC: H01L23/528 , H01L21/768 , H01L23/532 , H01L21/285
CPC classification number: H01L23/528 , H01L21/28556 , H01L21/28562 , H01L21/76834 , H01L21/76849 , H01L21/76856 , H01L21/76871 , H01L23/5226 , H01L23/53228 , H01L23/53238 , H01L23/53295
Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
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公开(公告)号:US10079177B1
公开(公告)日:2018-09-18
申请号:US15694354
申请日:2017-09-01
Applicant: United Microelectronics Corp.
Inventor: Ko-Wei Lin , Ying-Lien Chen , Chun-Ling Lin , Huei-Ru Tsai , Hung-Miao Lin , Sheng-Yi Su , Tzu-Hao Liu
IPC: H01L21/44 , H01L21/768 , H01L21/288
CPC classification number: H01L21/76873 , H01L21/28556 , H01L21/288 , H01L21/76843 , H01L21/76846 , H01L21/76847 , H01L21/76862 , H01L23/53238
Abstract: A method is provided for forming copper material over a substrate. The method includes forming a barrier layer over a substrate. Then, a depositing-soaking-treatment (DST) process is performed over the barrier layer. A copper layer is formed on the cobalt layer. The DST process includes depositing a cobalt layer on the barrier layer. Then, the cobalt layer is soaked with H2 gas at a first pressure. The cobalt layer is treated with a H2 plasma at a second pressure. The second pressure is lower than the first pressure.
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公开(公告)号:US20180261537A1
公开(公告)日:2018-09-13
申请号:US15466847
申请日:2017-03-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Hung-Miao Lin , Chun-Ling Lin , Ying-Lien Chen , Huei-Ru Tsai , Sheng-Yi Su
IPC: H01L23/528 , H01L23/532 , H01L21/285 , H01L21/768
CPC classification number: H01L23/528 , H01L21/28556 , H01L21/76871 , H01L23/5226 , H01L23/53228 , H01L23/53238 , H01L23/53295
Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
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公开(公告)号:US20230238445A1
公开(公告)日:2023-07-27
申请号:US17676216
申请日:2022-02-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Chun-Chieh Chiu , Chun-Ling Lin , Shu Min Huang , Hsin-Fu Huang
IPC: H01L29/66 , H01L29/20 , H01L29/778 , H01L21/768 , H01L21/324
CPC classification number: H01L29/66431 , H01L29/2003 , H01L29/7786 , H01L21/76841 , H01L21/3245
Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer, a barrier layer and a passivation layer. A contact structure is disposed on the passivation layer and extends through the passivation layer and the barrier layer to directly contact the channel layer. The contact structure includes a metal layer, and the metal layer includes a metal material doped with a first additive. A weight percentage of the first additive in the metal layer is between 0% and 2%.
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公开(公告)号:US20200168450A1
公开(公告)日:2020-05-28
申请号:US16203212
申请日:2018-11-28
Applicant: United Microelectronics Corp.
Inventor: Ko-Wei Lin , Kuan-Hsiang Chen , Hsin-Fu Huang , Chun-Ling Lin , Sheng-Yi Su , Pei-Hsun Kao
IPC: H01L21/02 , H01L21/285 , H01L21/768
Abstract: A method for fabricating interconnect of semiconductor device. The method includes providing a base substrate, having an inter-layer dielectric layer on top. A copper interconnect structure is formed in the inter-layer dielectric layer. A pre-sputter clean process is performed with hydrogen radicals on the copper interconnect structure. A degas process is sequentially performed on the copper interconnect structure. A cobalt cap layer is formed on the copper interconnect structure.
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公开(公告)号:US20180138263A1
公开(公告)日:2018-05-17
申请号:US15350453
申请日:2016-11-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Yen-Chen Chen , Chin-Fu Lin , Chun-Yuan Wu , Chun-Ling Lin
IPC: H01L49/02
CPC classification number: H01L28/75
Abstract: A semiconductor structure includes a capacitor. The capacitor includes a bottom electrode, a first high-k dielectric layer, a second high-k dielectric layer and a top electrode. The bottom electrode includes a first layer and a second layer disposed on the first layer. The bottom electrode is formed of TiN. The first layer has a crystallization structure. The second layer has an amorphous structure. The first high-k dielectric layer is disposed on the bottom electrode. The first high-k dielectric layer is formed of TiO2. The second high-k dielectric layer is disposed on the first high-k dielectric layer. The second high-k dielectric layer is formed of a material different from TiO2. The top electrode is disposed on the second high-k dielectric layer.
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公开(公告)号:US20220320420A1
公开(公告)日:2022-10-06
申请号:US17844741
申请日:2022-06-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Kuo-Chih Lai , Yi-Syun Chou , Ko-Wei Lin , Pei-Hsun Kao , Wei Chen , Chia-Fu Cheng , Chun-Yao Yang , Chia-Chang Hsu
Abstract: A magnetoresistive random access memory (MRAM) structure includes a magnetic tunnel junction (MTJ), and a top electrode which contacts an end of the MTJ. The top electrode includes a top electrode upper portion and a top electrode lower portion. The width of the top electrode upper portion is larger than the width of the top electrode lower portion. A bottom electrode contacts another end of the MTJ. The top electrode, the MTJ and the bottom electrode form an MRAM.
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公开(公告)号:US10153231B2
公开(公告)日:2018-12-11
申请号:US15466847
申请日:2017-03-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Hung-Miao Lin , Chun-Ling Lin , Ying-Lien Chen , Huei-Ru Tsai , Sheng-Yi Su
IPC: H01L23/528 , H01L21/285 , H01L21/768 , H01L23/532
Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
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公开(公告)号:US12237395B2
公开(公告)日:2025-02-25
申请号:US17676216
申请日:2022-02-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ko-Wei Lin , Chun-Chieh Chiu , Chun-Ling Lin , Shu Min Huang , Hsin-Fu Huang
IPC: H01L29/66 , H01L21/324 , H01L21/768 , H01L29/20 , H01L29/778
Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer, a barrier layer and a passivation layer. A contact structure is disposed on the passivation layer and extends through the passivation layer and the barrier layer to directly contact the channel layer. The contact structure includes a metal layer, and the metal layer includes a metal material doped with a first additive. A weight percentage of the first additive in the metal layer is between 0% and 2%.
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公开(公告)号:US11856870B2
公开(公告)日:2023-12-26
申请号:US17844741
申请日:2022-06-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Kuo-Chih Lai , Yi-Syun Chou , Ko-Wei Lin , Pei-Hsun Kao , Wei Chen , Chia-Fu Cheng , Chun-Yao Yang , Chia-Chang Hsu
Abstract: A magnetoresistive random access memory (MRAM) structure includes a magnetic tunnel junction (MTJ), and a top electrode which contacts an end of the MTJ. The top electrode includes a top electrode upper portion and a top electrode lower portion. The width of the top electrode upper portion is larger than the width of the top electrode lower portion. A bottom electrode contacts another end of the MTJ. The top electrode, the MTJ and the bottom electrode form an MRAM.
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