公开(公告)号：US07067916B2

公开(公告)日：2006-06-27

申请号：US09885853

申请日：2001-06-20

申请人： William E. Bernier ,  Charles F. Carey ,  Eberhard B. Gramatzki ,  Thomas R. Homa ,  Eric A. Johnson ,  Pierre Langevin ,  Irving Memis ,  Son K. Tran ,  Robert F. White

发明人： William E. Bernier ,  Charles F. Carey ,  Eberhard B. Gramatzki ,  Thomas R. Homa ,  Eric A. Johnson ,  Pierre Langevin ,  Irving Memis ,  Son K. Tran ,  Robert F. White

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/351 ,  H05K3/3436 ,  H01L2924/00

摘要： A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.

公开(公告)号：US07119003B2

公开(公告)日：2006-10-10

申请号：US11148923

申请日：2005-06-08

申请人： William E. Bernier ,  Charles F. Carey ,  Eberhard B. Gramatzki ,  Thomas R. Homa ,  Eric A. Johnson ,  Pierre Langevin ,  Irving Memis ,  Son K. Tran ,  Robert F. White

发明人： William E. Bernier ,  Charles F. Carey ,  Eberhard B. Gramatzki ,  Thomas R. Homa ,  Eric A. Johnson ,  Pierre Langevin ,  Irving Memis ,  Son K. Tran ,  Robert F. White

IPC分类号： H01L21/44

CPC分类号： H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/351 ,  H05K3/3436 ,  H01L2924/00

摘要： A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.

公开(公告)号：US07560950B2

公开(公告)日：2009-07-14

申请号：US11954589

申请日：2007-12-12

申请人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

发明人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

IPC分类号： G01R31/02 ,  G01R31/26

CPC分类号： G01R31/2856 ,  G01R31/2853 ,  G01R31/2855 ,  G01R31/2875 ,  G01R31/2879

摘要： A test chip module for testing the integrity of the flp chip solder ball interconnections between chip and substrate. The interconnections, are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

摘要翻译： 用于测试芯片和衬底之间的flp芯片焊球互连的完整性的测试芯片模块。 这些互连通过在芯片冶金层中形成的各个加热器阵列进行热应力，以提供均匀且普遍存在的热源。 电流通过互连使用一个信号I / O互连由电流供应电路进行测试，并且通过其中通过的电流将要测试的互连线上的电压降由通过另一个信号I / O连接的电压测量电路测量 互连。 在互连处的应力引发开裂和退化在互连上产生可测量的电压降变化。

公开(公告)号：US4097011A

公开(公告)日：1978-06-27

申请号：US815108

申请日：1977-07-13

申请人： Robert F. White

发明人： Robert F. White

IPC分类号： B64D27/26

CPC分类号： B64D27/26

摘要： A gas turbine engine acoustic noise damping mount on a helicopter airframe includes a first outboard washer assembly with metallic inner and outer washers having a thin layer of elastomer bonded therebetween; an inboard bushing assembly has telescoped inner and outer metallic bushings with a thin layer of elastomer bonded therebetween; an engine trunnion is supported by the inner bushing; and flat inboard faces on the washer assembly and inboard bushing assembly are held against either side of an airframe strut by a nut threaded to the trunnion. The inboard bushing assembly includes a tubular extension pilot guided within an engine strut whereby the thin layers of elastomer serve to interrupt transmission of structure borne sound from engine to airframe.

摘要翻译： 一种在直升机机身上的燃气涡轮发动机噪音减震装置包括：第一外侧垫圈组件，其具有金属内外垫圈，其间具有粘合在其间的薄层弹性体; 内部衬套组件具有套筒内部和外部金属衬套，其中粘合有薄层弹性体; 发动机耳轴由内衬支撑; 并且垫圈组件和内侧衬套组件上的平坦内侧面通过螺纹连接到耳轴的螺母而保持在机身支柱的任一侧。 内侧衬套组件包括在发动机支柱内引导的管状延伸引导件，由此弹性薄层用于中断从发动机到机身的结构声音的传递。

公开(公告)号：US07348792B2

公开(公告)日：2008-03-25

申请号：US11491216

申请日：2006-07-21

申请人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

发明人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

IPC分类号： G01R31/26 ,  G01R31/02

CPC分类号： G01R31/2856 ,  G01R31/2853 ,  G01R31/2855 ,  G01R31/2875 ,  G01R31/2879

摘要： A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

摘要翻译： 用于测试芯片和衬底之间的倒装芯片焊球互连的完整性的测试芯片模块。 互连通过在芯片冶金层中形成的各个加热器的阵列进行热应力，以提供均匀且普遍存在的热源。 电流通过互连使用一个信号I / O互连由电流供应电路进行测试，并且通过其中通过的电流将要测试的互连线上的电压降由通过另一个信号I / O连接的电压测量电路测量 互连。 在互连处的应力引发开裂和退化在互连上产生可测量的电压降变化。

公开(公告)号：US07102377B1

公开(公告)日：2006-09-05

申请号：US11159913

申请日：2005-06-23

申请人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

发明人： Jason E. Blanchet ,  James V. Crain, Jr. ,  Charles W. Griffin ,  David B. Stone ,  Robert F. White

IPC分类号： G01R31/26 ,  G01R31/02 ,  G01R31/28

CPC分类号： G01R31/2856 ,  G01R31/2853 ,  G01R31/2855 ,  G01R31/2875 ,  G01R31/2879

摘要： A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

摘要翻译： 一种测试芯片模块，用于测试芯片和衬底之间的倒装芯片焊球互连的完整性。 互连通过在芯片冶金层中形成的各个加热器的阵列进行热应力，以提供均匀且普遍存在的热源。 电流通过互连使用一个信号I / O互连由电流供应电路进行测试，并且通过其中通过的电流将要测试的互连线上的电压降由通过另一个信号I / O连接的电压测量电路测量 互连。 在互连处的应力引发开裂和退化在互连上产生可测量的电压降变化。

公开(公告)号：US3936123A

公开(公告)日：1976-02-03

申请号：US517219

申请日：1974-10-23

申请人： Willie P. Gossett ,  Robert F. White

发明人： Willie P. Gossett ,  Robert F. White

IPC分类号： H01R13/56 ,  H01R13/633 ,  H01R13/62

CPC分类号： H01R13/56 ,  H01R13/633

摘要： Disclosed is electrical plug ejecting apparatus having an elongated housing adapted to transversely retain the electrical plug, the housing defining a pair of spaced compartments disposed on opposite sides of the retained plug with ejector springs latchably retained within the compartments by trap doors tripably released by pivotal movement of a trip lever in response to the lateral movement of the line cord coupled to the electrical plug.

摘要翻译： 公开了一种具有细长壳体的电插头弹出装置，其适于横向地保持电插头，壳体限定一对间隔开的隔间，该间隔件设置在保持插塞的相对侧上，弹簧弹簧通过枢转运动可释放地通过捕获门闩锁地保持在隔间内 响应于耦合到电插头的线路线的横向移动而导致跳闸杆。