公开(公告)号：US20110253424A1

公开(公告)日：2011-10-20

申请号：US12780960

申请日：2010-05-17

申请人： YING-TSO LAI ,  HSIAO-YUN SU

发明人： YING-TSO LAI ,  HSIAO-YUN SU

IPC分类号： H05K1/00

CPC分类号： H05K1/0253 ,  H05K1/0219 ,  H05K1/0227 ,  H05K1/028 ,  H05K2201/09236 ,  H05K2201/0969

摘要： A FPCB includes a signal layer, a ground layer, and a dielectric layer lying between the signal layer and the ground layer. At least one high speed signal transmission line is formed on the signal layer. The ground layer has a copper-removed area corresponding to the transmission line. Two ground lines are symmetrically disposed at two opposite sides of the signal transmission line and substantially parallel to the signal transmission line, each ground line and the signal transmission line is spaced at a first predetermined distance. Each ground line and the signal transmission line are spaced at a first predetermined distance.

摘要翻译： FPCB包括位于信号层和接地层之间的信号层，接地层和电介质层。 在信号层上形成至少一条高速信号传输线。 接地层具有对应于传输线的铜去除区域。 两个接地线对称地设置在信号传输线的两个相对侧并且基本上平行于信号传输线，每个接地线和信号传输线以第一预定距离间隔开。 每个接地线和信号传输线以第一预定距离隔开。

公开(公告)号：US20100253383A1

公开(公告)日：2010-10-07

申请号：US12425394

申请日：2009-04-17

申请人： HSIAO-YUN SU ,  YING-TSO LAI ,  SHOU-KUO HSU

发明人： HSIAO-YUN SU ,  YING-TSO LAI ,  SHOU-KUO HSU

IPC分类号： H03K19/003

CPC分类号： H05K1/0246 ,  H05K2201/044 ,  H05K2201/09727

摘要： A circuit topology for multiple loads includes a driving terminal for transmitting a driving signal, a number of transmitting lines, and a number of loads operable to receive the driving signal from the driving terminal. The number of loads are connected to the driving terminal one by one via the number of transmitting lines. Two transmitting lines of the number of transmitting lines, which are nearest and farthest respectively from the driving terminal, are both greater than widths of the other transmitting lines.

摘要翻译： 用于多个负载的电路拓扑包括用于发送驱动信号的驱动端子，多个发送线路和可操作以从驱动端子接收驱动信号的多个负载。 负载数量通过传输线数量逐个连接到驱动端子。 距离驱动终端最近和最远的发送线数目的两条发送线都大于其他发送线的宽度。

公开(公告)号：US20130168145A1

公开(公告)日：2013-07-04

申请号：US13626896

申请日：2012-09-26

申请人： YING-TSO LAI ,  HSIAO-YUN SU

发明人： YING-TSO LAI ,  HSIAO-YUN SU

IPC分类号： H01G4/005 ,  H05K1/16

CPC分类号： H01G4/012 ,  H01G4/228 ,  H01G4/33 ,  H01G4/38 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/0191 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09672

摘要： A capacitor includes at least two electrode layers opposite to each other and a dielectric layer positioned between the at least two electrode layers. The at least two electrode layers have opposite polarities. Each electrode layer includes a positive electrode and a negative electrode. The positive electrode includes a plurality of first coupling portions spaced substantially evenly and arranged in parallel. The negative electrode includes a plurality of second coupling portions spaced substantially evenly and arranged in parallel. The positive electrode and the negative electrode of each electrode layer are coplanar, and the plurality of first coupling portions interlace with the plurality of second coupling portions.

摘要翻译： 电容器包括彼此相对的至少两个电极层和位于所述至少两个电极层之间的电介质层。 至少两个电极层具有相反的极性。 每个电极层包括正极和负极。 正电极包括大致均匀间隔开并且平行布置的多个第一耦合部分。 负极包括大致均匀间隔开并且平行布置的多个第二联接部。 每个电极层的正电极和负电极是共面的，并且多个第一耦合部分与多个第二耦合部分交织。

公开(公告)号：US20130163646A1

公开(公告)日：2013-06-27

申请号：US13548223

申请日：2012-07-13

申请人： YING-TSO LAI ,  HSIAO-YUN SU ,  DAN-CHEN WU ,  SHIN-TING YEN

发明人： YING-TSO LAI ,  HSIAO-YUN SU ,  DAN-CHEN WU ,  SHIN-TING YEN

IPC分类号： H04L27/01

CPC分类号： H04L25/03878

摘要： A method for setting a signal-equalizing system for use in an electronic device includes the following steps. Outputting a connection status of each channel and a number of misconnect options respectively associated with each channel to a display unit of the electronic device. Then, detecting whether at least one misconnect option is selected. If yes, determining a misconnected channel and adjusting the receiving setting for the receiving port of the misconnected channel to match with the transmitting setting for the transmitting port of the misconnected channel according to settings for each channel stored in the electronic device. The stored settings for each channel include a transmitting setting for the transmitting port of the channel and a receiving setting for the receiving port of the channel that matches the transmitting setting.

摘要翻译： 一种用于设置用于电子设备的信号均衡系统的方法包括以下步骤。 将每个通道的连接状态和与每个通道分别相关联的多个错误连接选项输出到电子设备的显示单元。 然后，检测是否选择了至少一个错误连接选项。 如果是，则根据存储在电子设备中的每个通道的设置，确定错误连接的信道并且调整误连接信道的接收端口的接收设置以与错连接信道的发送端口的发送设置相匹配。 每个通道的存储设置包括通道发送端口的发送设置和与发送设置匹配的通道接收端口的接收设置。

公开(公告)号：US20120066660A1

公开(公告)日：2012-03-15

申请号：US13092966

申请日：2011-04-24

申请人： HSIAO-YUN SU ,  YING-TSO LAI ,  CHENG-HSIEN LEE

发明人： HSIAO-YUN SU ,  YING-TSO LAI ,  CHENG-HSIEN LEE

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： In a method of managing process factors that influence electrical properties of printed circuit boards (PCBs), n process factors are arranged in an order according to different influence to one kind of electrical property of the PCBs. The different influence is determined by first experiments designed using the Taguchi method. M process factors that have important influence to the electrical property are obtained from the n process factors according to the order to design second experiments. A computing formula for the electrical property is fitted using the m process factors according to simulated results of the second experiments, and a variation range of each of the m process factors is computed according to the computing formula.

摘要翻译： 在管理影响印刷电路板（PCB）的电性能的工艺因素的方法中，根据对PCB的一种电性能的不同影响，n个工艺因素按顺序排列。 不同的影响由使用田口方法设计的第一个实验确定。 对电性能有重要影响的M个工艺因素根据设计第二个实验的顺序从n个工艺因素中获得。 根据第二次实验的模拟结果，使用m个工艺因子拟合电性能的计算公式，并根据计算公式计算每个m个工艺因子的变化范围。

公开(公告)号：US20120110540A1

公开(公告)日：2012-05-03

申请号：US13094807

申请日：2011-04-26

申请人： HSIAO-YUN SU ,  YING-TSO LAI ,  CHENG-HSIEN LEE

发明人： HSIAO-YUN SU ,  YING-TSO LAI ,  CHENG-HSIEN LEE

IPC分类号： G06F17/50

CPC分类号： G06F17/505 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/08

摘要： In a method of optimizing parameters of electronic components on printed circuit boards (PCBs), a first experiment table for m variables of one type of parameter of P electronic components on a PCB is designed using n values of each variable and the RSM. P EHs of each first experiment are obtained by simulating, and P EH empirical formulas are computed according to the P EHs. A second experiment table for the m variables is designed using n′ values of each variable and the full factorial design, and P EHs of each second experiment are computed using the P EH empirical formulas. Experiments, all the P EHs of which are greater than 1, are filtered from the second experiment tables, and an average EH of each filtered experiment is computed to pick an experiment the average EH of which is the greatest. The values of the m variables in the picked experiment are considered as optimized.

摘要翻译： 在印刷电路板（PCB）上优化电子部件参数的方法中，使用每个变量和RSM的n个值设计PCB上P电子部件的一种类型参数的m个变量的第一个实验表。 通过模拟获得每个第一个实验的P EH，并且根据P EH计算P EH经验公式。 使用每个变量的n'值和全因子设计设计m个变量的第二个实验表，并且使用P EH经验公式计算每个第二个实验的P EH。 从第二个实验表中筛选出所有P EH大于1的实验，并计算每个滤波实验的平均EH，以选择其平均EH最大的实验。 所选实验中的m个变量的值被认为是优化的。

公开(公告)号：US20110038427A1

公开(公告)日：2011-02-17

申请号：US12560445

申请日：2009-09-16

申请人： SHOU-KUO HSU ,  CHENG-HSIEN LEE ,  YING-TSO LAI ,  HSIAO-YUN SU ,  JIA-CHI CHEN

发明人： SHOU-KUO HSU ,  CHENG-HSIEN LEE ,  YING-TSO LAI ,  HSIAO-YUN SU ,  JIA-CHI CHEN

IPC分类号： H04L27/00

CPC分类号： H04L25/0272

摘要： A differential signal transmission device transmits N differential signal pairs from a differential signal generator to a number of receiving terminals. The N differential signal pairs include N positive signals and N negative signals. The N positive signals are clustered at a first positive clustering point. The first positive clustering point is connected to a second positive clustering point via a first matching resistor. The second positive clustering point is grounded via a first grounding resistor, and outputs a number of positive signals to the number of receiving terminals respectively. The N negative signals are clustered at a first negative clustering point. The first negative clustering point is connected to a second negative clustering point via a second matching resistor. The second negative signal clustering point is grounded via a second grounding resistor, and outputs a number of negative signals to the number of receiving terminals respectively.

摘要翻译： 差分信号传输装置将差分信号发生器的N个差分信号对发送到多个接收终端。 N个差分信号对包括N个正信号和N个负信号。 N个正信号聚集在第一个正聚类点。 第一正聚集点通过第一匹配电阻连接到第二正聚集点。 第二个正聚集点通过第一接地电阻接地，并分别输出多个正信号到接收端的数量。 N个负信号聚集在第一个负聚类点。 第一负聚集点通过第二匹配电阻器连接到第二负聚集点。 第二负信号聚簇点通过第二接地电阻接地，并分别输出多个负信号至接收端数。

公开(公告)号：US20120097436A1

公开(公告)日：2012-04-26

申请号：US12973604

申请日：2010-12-20

申请人： YING-TSO LAI ,  YU-CHANG PAI

发明人： YING-TSO LAI ,  YU-CHANG PAI

IPC分类号： H05K1/09

CPC分类号： H05K1/116 ,  H05K3/3447

摘要： A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole extends through the printed circuit board. A thermal engraving is defined in the surface of the layer, surrounding the through hole and without being covered by the layer of copper. The thermal engraving includes a first opening and a second opening. The first opening of the thermal engraving faces an output terminal of the power supply, and is non-contiguous with the second opening.

摘要翻译： 印刷电路板包括一层。 铜层被覆盖在该层的表面上。 通孔延伸穿过印刷电路板。 在该表面中限定了热雕刻，围绕通孔并且不被铜层覆盖。 热雕刻包括第一开口和第二开口。 热雕刻的第一开口面向电源的输出端，并且与第二开口不连续。

公开(公告)号：US20120018199A1

公开(公告)日：2012-01-26

申请号：US12870999

申请日：2010-08-30

申请人： YING-TSO LAI ,  YU-CHANG PAI

发明人： YING-TSO LAI ,  YU-CHANG PAI

IPC分类号： H05K1/09

CPC分类号： H05K3/3447 ,  H05K1/0271 ,  H05K2201/093 ,  H05K2201/0969

摘要： A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole passes through the printed circuit board. An approximately C-shaped thermal engraving is defined in the surface of the layers, surrounding the through hole and without being covered by the layer of copper. An opening of the thermal engraving faces an output terminal of the power supply.

摘要翻译： 印刷电路板包括一层。 铜层被覆盖在该层的表面上。 通孔穿过印刷电路板。 在层的表面中限定大致C形的热雕刻，围绕通孔并且不被铜层覆盖。 热雕刻的开口面向电源的输出端子。

公开(公告)号：US20120229993A1

公开(公告)日：2012-09-13

申请号：US13108997

申请日：2011-05-17

申请人： WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

发明人： WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

IPC分类号： H05K7/14 ,  H05K1/02 ,  H05F3/00

CPC分类号： H05K9/0067 ,  H05K1/0215 ,  H05K1/0259 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/10189

摘要： An exemplary antistatic circuit board includes a first outer layer, a second outer layer, a first ground layer, and a second ground layer. The first ground layer and the second ground layer are positioned between the first outer layer and the second outer layer. The first ground layer is adjacent to the first outer layer and the second ground layer is adjacent to the second outer layer. The antistatic circuit board defines two position holes each penetrating through the first ground layer and the second ground layer. Two circuit grounds are wired on the first ground layer and the second ground layer, respectively. The second ground layer further includes a chassis ground. Each of the position holes also penetrates through the chassis ground.

摘要翻译： 示例性的抗静电电路板包括第一外层，第二外层，第一接地层和第二接地层。 第一接地层和第二接地层位于第一外层和第二外层之间。 第一接地层与第一外层相邻，第二接地层与第二外层相邻。 抗静电电路板限定了穿过第一接地层和第二接地层的两个位置孔。 两个电路接地分别布置在第一接地层和第二接地层上。 第二接地层还包括底盘接地。 每个位置孔也穿过底盘地面。