公开(公告)号：US08759865B2

公开(公告)日：2014-06-24

申请号：US13806703

申请日：2011-08-03

申请人： Yao-Jun Tsai ,  Chen-Peng Hsu ,  Kuo-Feng Lin ,  Hsun-Chih Liu ,  Ji-Feng Chen ,  Hung-Lieh Hu ,  Chien-Jen Sun

发明人： Yao-Jun Tsai ,  Chen-Peng Hsu ,  Kuo-Feng Lin ,  Hsun-Chih Liu ,  Ji-Feng Chen ,  Hung-Lieh Hu ,  Chien-Jen Sun

IPC分类号： H01L33/20 ,  H01L33/38 ,  H01L33/48 ,  H01L33/10 ,  H01L33/62 ,  H01L33/00

CPC分类号： H01L33/62 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/10 ,  H01L33/20 ,  H01L33/38 ,  H01L33/48 ,  H01L2224/06102 ,  H01L2224/14 ,  H01L2224/16225 ,  H01L2224/24 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/8592 ,  H01L2224/92244 ,  H01L2924/12032 ,  H01L2924/00 ,  H01L2924/00014

摘要： A light emitting diode chip, a light emitting diode package structure and a method for forming the same are provided. The light emitting diode chip includes a bonding layer, which has a plurality of voids, or a minimum horizontal distance between a surrounding boundary of the light emitting diode chip and the bonding layer is larger than 0. The light emitting diode chip, the light emitting diode package structure and the method may improve the product yields and enhance the light emitting efficiency.

摘要翻译： 提供一种发光二极管芯片，发光二极管封装结构及其形成方法。 发光二极管芯片包括具有多个空隙的接合层，或者发光二极管芯片的周围边界与接合层之间的最小水平距离大于0.发光二极管芯片，发光 二极管封装结构和方法可以提高产品产量并提高发光效率。

公开(公告)号：US09178107B2

公开(公告)日：2015-11-03

申请号：US13197677

申请日：2011-08-03

申请人： Yao-Jun Tsai ,  Chen-Peng Hsu ,  Kuo-Feng Lin ,  Hsun-Chih Liu ,  Hung-Lieh Hu ,  Chien-Jen Sun

发明人： Yao-Jun Tsai ,  Chen-Peng Hsu ,  Kuo-Feng Lin ,  Hsun-Chih Liu ,  Hung-Lieh Hu ,  Chien-Jen Sun

IPC分类号： H01L33/00 ,  H01L33/20 ,  H01L33/44

CPC分类号： H01L33/0095 ,  H01L33/20 ,  H01L33/44 ,  H01L2933/0016

摘要： A method for fabricating a wafer-level light emitting diode structure is provided. The method includes: providing a substrate, wherein a first semiconductor layer, a light emitting layer, and a second semiconductor layer are sequentially disposed on the substrate; subjecting the first semiconductor layer, the light emitting layer, and the second semiconductor layer with a patterning process to form a first depressed portion, a second depressed portion, a stacked structure disposed on the second depressed portion and a remained first semiconductor layer disposed on the depressed portion, wherein the stacked structure comprises a patterned second semiconductor layer, a patterned emitting layer, and a patterned first semiconductor layer; forming a first electrode on the remained first semiconductor layer of the first depressed portion; and forming a second electrode correspondingly disposed on the patterned second semiconductor layer of the second depressed portion.

摘要翻译： 提供了一种制造晶片级发光二极管结构的方法。 该方法包括：提供衬底，其中第一半导体层，发光层和第二半导体层依次设置在衬底上; 通过图案化工艺对第一半导体层，发光层和第二半导体层进行处理，以形成设置在第二凹部上的第一凹部，第二凹部，层叠结构，以及设置在第二凹部 凹陷部分，其中所述堆叠结构包括图案化的第二半导体层，图案化发光层和图案化的第一半导体层; 在第一凹部的残留的第一半导体层上形成第一电极; 以及形成相应地设置在所述第二凹陷部分的图案化的第二半导体层上的第二电极。

公开(公告)号：US20120146190A1

公开(公告)日：2012-06-14

申请号：US12963650

申请日：2010-12-09

申请人： Hsun-Chih Liu ,  Chen-Zi Liao ,  Yen-Hsiang Fang ,  Rong Xuan ,  Chu-Li Chao

发明人： Hsun-Chih Liu ,  Chen-Zi Liao ,  Yen-Hsiang Fang ,  Rong Xuan ,  Chu-Li Chao

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/0254 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/3081 ,  H01L29/045 ,  H01L29/2003

摘要： A nitride semiconductor template including a substrate, a mask layer, a first nitride semiconductor layer and a second nitride semiconductor is provided. The substrate has a plurality of trenches, each of the trenches has a bottom surface, a first inclined sidewall and a second inclined sidewall. The mask layer covers the second inclined sidewall and exposes the first inclined sidewall. The first nitride semiconductor layer is disposed over the substrate and the mask layer. The first nitride semiconductor layer fills the trenches and in contact with the first inclined sidewall. The first nitride semiconductor layer has voids located outside the trenches and parts of the mask layer are exposed by the voids. The first nitride semiconductor layer has a plurality of nano-rods. The second nitride semiconductor layer covers the nano-rods. The spaces between the nano-rods are not entirely filled by the second nitride semiconductor layer.

摘要翻译： 提供了包括基板，掩模层，第一氮化物半导体层和第二氮化物半导体的氮化物半导体模板。 衬底具有多个沟槽，每个沟槽具有底表面，第一倾斜侧壁和第二倾斜侧壁。 掩模层覆盖第二倾斜侧壁并暴露第一倾斜侧壁。 第一氮化物半导体层设置在衬底和掩模层之上。 第一氮化物半导体层填充沟槽并与第一倾斜侧壁接触。 第一氮化物半导体层具有位于沟槽外部的空隙，并且掩模层的部分被空隙暴露。 第一氮化物半导体层具有多个纳米棒。 第二氮化物半导体层覆盖纳米棒。 纳米棒之间的空间并不完全由第二氮化物半导体层填充。

公开(公告)号：US20110003410A1

公开(公告)日：2011-01-06

申请号：US12648308

申请日：2009-12-29

申请人： Jenq-Dar Tsay ,  Suh-Fang Lin ,  Yu-Hsiang Chang ,  Yih-Der Guo ,  Sheng-Huei Kuo ,  Wei-Hung Kuo ,  Hsun-Chih Liu

发明人： Jenq-Dar Tsay ,  Suh-Fang Lin ,  Yu-Hsiang Chang ,  Yih-Der Guo ,  Sheng-Huei Kuo ,  Wei-Hung Kuo ,  Hsun-Chih Liu

IPC分类号： H01L33/48 ,  H01L33/60

CPC分类号： H01L33/0079 ,  H01L33/20 ,  H01L33/405 ,  H01L33/44

摘要： A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.

摘要翻译： 提供一种制造发光二极管元件的方法。 在外延基板上依次形成第一图案化半导体层，图案化发光层和第二图案化半导体层，以形成多个外延结构，其中第一图案化半导体层具有较薄的 部分在外延结构外的非外延区域。 形成覆盖外延结构和较薄部分的钝化层。 覆盖在较薄部分上的钝化层被部分地去除以形成图案化的钝化层。 在每个外延结构上直接形成图案化反射体。 外延结构被结合到载体衬底上。 进行剥离处理以将外延结构与外延基板分离。 在远离图案化反射器的每个外延结构上形成电极。

公开(公告)号：US08173456B2

公开(公告)日：2012-05-08

申请号：US12648308

申请日：2009-12-29

申请人： Jenq-Dar Tsay ,  Suh-Fang Lin ,  Yu-Hsiang Chang ,  Yih-Der Guo ,  Sheng-Huei Kuo ,  Wei-Hung Kuo ,  Hsun-Chih Liu

发明人： Jenq-Dar Tsay ,  Suh-Fang Lin ,  Yu-Hsiang Chang ,  Yih-Der Guo ,  Sheng-Huei Kuo ,  Wei-Hung Kuo ,  Hsun-Chih Liu

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/20 ,  H01L33/405 ,  H01L33/44

摘要： A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.

摘要翻译： 提供一种制造发光二极管元件的方法。 在外延基板上依次形成第一图案化半导体层，图案化发光层和第二图案化半导体层，以形成多个外延结构，其中第一图案化半导体层具有较薄的 部分在外延结构外的非外延区域。 形成覆盖外延结构和较薄部分的钝化层。 覆盖在较薄部分上的钝化层被部分地去除以形成图案化的钝化层。 在每个外延结构上直接形成图案化反射体。 外延结构被结合到载体衬底上。 进行剥离处理以将外延结构与外延基板分离。 在远离图案化反射器的每个外延结构上形成电极。

公开(公告)号：US08482103B2

公开(公告)日：2013-07-09

申请号：US12963650

申请日：2010-12-09

申请人： Hsun-Chih Liu ,  Chen-Zi Liao ,  Yen-Hsiang Fang ,  Rong Xuan ,  Chu-Li Chao

发明人： Hsun-Chih Liu ,  Chen-Zi Liao ,  Yen-Hsiang Fang ,  Rong Xuan ,  Chu-Li Chao

IPC分类号： H01L29/20

CPC分类号： H01L21/0254 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/3081 ,  H01L29/045 ,  H01L29/2003

摘要： A nitride semiconductor template including a substrate, a mask layer, a first nitride semiconductor layer and a second nitride semiconductor is provided. The substrate has a plurality of trenches, each of the trenches has a bottom surface, a first inclined sidewall and a second inclined sidewall. The mask layer covers the second inclined sidewall and exposes the first inclined sidewall. The first nitride semiconductor layer is disposed over the substrate and the mask layer. The first nitride semiconductor layer fills the trenches and in contact with the first inclined sidewall. The first nitride semiconductor layer has voids located outside the trenches and parts of the mask layer are exposed by the voids. The first nitride semiconductor layer has a plurality of nano-rods. The second nitride semiconductor layer covers the nano-rods. The spaces between the nano-rods are not entirely filled by the second nitride semiconductor layer.

摘要翻译： 提供了包括基板，掩模层，第一氮化物半导体层和第二氮化物半导体的氮化物半导体模板。 衬底具有多个沟槽，每个沟槽具有底表面，第一倾斜侧壁和第二倾斜侧壁。 掩模层覆盖第二倾斜侧壁并暴露第一倾斜侧壁。 第一氮化物半导体层设置在衬底和掩模层之上。 第一氮化物半导体层填充沟槽并与第一倾斜侧壁接触。 第一氮化物半导体层具有位于沟槽外部的空隙，并且掩模层的部分被空隙暴露。 第一氮化物半导体层具有多个纳米棒。 第二氮化物半导体层覆盖纳米棒。 纳米棒之间的空间并不完全由第二氮化物半导体层填充。