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    Ferroelectric memory device having ferroelectric memory transistors connected to separate well lines
    1.
    发明授权
    Ferroelectric memory device having ferroelectric memory transistors connected to separate well lines 有权
    具有连接到分离的井管线的铁电存储晶体管的铁电存储器件

    公开(公告)号：US06411542B1

    公开(公告)日：2002-06-25

    申请号：US09966112

    申请日：2001-10-01

    申请人： Yil Suk Yang ,  Byoung Gon Yu ,  In Kyu You ,  Won Jae Lee ,  Kyoung Ik Cho

    发明人： Yil Suk Yang ,  Byoung Gon Yu ,  In Kyu You ,  Won Jae Lee ,  Kyoung Ik Cho

    IPC分类号： G11C1122

    CPC分类号： G11C11/22

    摘要： A ferroelectric memory device including a single ferroelectric transistor that one unit memory cell is independently selected and programmed, when the unit memory cell is programmed for “the first state” or “the second state” by applying a DC bias voltage to the single ferroelectric transistor's gate and well. In addition, the ferroelectric memory device can be applied with normal power level Vdd and GND. The ferroelectric memory device includes a plurality of unit memory cells which are arranged in a matrix, by crossing at least one word line in a column direction with a plurality of bit lines and source lines in a row direction and is connected between the source line and the bit line.

    摘要翻译： 当单位存储单元被编程为“第一状态”或“第二状态”时，包括单个存储单元被独立地选择和编程的单个铁电晶体管的铁电存储器件通过将DC偏置电压施加到单个铁电晶体管 门和井。 此外，铁电存储器件可以应用正常的功率电平Vdd和GND。 铁电存储器件包括多个单元存储单元，它们以矩阵形式布置，使列方向上的至少一个字线与行方向上的多个位线和源极线相交，并连接在源极线和 位线。

    Ferroelectric memory cell array and method of storing data using the same
    3.
    发明授权
    Ferroelectric memory cell array and method of storing data using the same 有权
    铁电存储单元阵列及使用其存储数据的方法

    公开(公告)号：US06636435B2

    公开(公告)日：2003-10-21

    申请号：US10032987

    申请日：2001-12-27

    申请人： Yil Suk Yang ,  Tae Moon Roh ,  Jong Dae Kim ,  Byoung Gon Yu

    发明人： Yil Suk Yang ,  Tae Moon Roh ,  Jong Dae Kim ,  Byoung Gon Yu

    IPC分类号： G11C1122

    CPC分类号： G11C11/22

    摘要： The present invention relates to a ferroelectric memory cell array formed of a single transistor, and method of storing data using the same. The ferroelectric memory cell array includes a plurality of word lines connected to gates of the memory cells located at respective rows, a plurality of bit lines connected to drains of the memory cells located at respective columns, a common source line commonly connecting sources of the memory cells, and a plurality of well lines each connected to wells in which the memory cells are each formed, wherein a bias voltage of an unit pulse shape is applied to a gate of a selected memory cell and a bias voltage of a pulse shape is applied to a well line. Therefore, the present invention allows a random access without a disturbance since data can be written by means of the polarity characteristic of the ferroelectric.

    摘要翻译： 本发明涉及由单个晶体管形成的铁电存储单元阵列，以及使用该晶体管存储数据的方法。 铁电存储单元阵列包括连接到位于各行的存储单元的栅极的多条字线，连接到位于相应列的存储单元的漏极的多个位线，通常连接存储器的源极的公共源极线 单元和多个井管线，每个阱管线连接到其中形成有存储单元的阱，其中单位脉冲形状的偏置电压被施加到所选存储单元的栅极并施加脉冲形状的偏置电压 到一条井线 因此，本发明允许无障碍地随机存取，因为可以通过铁电体的极性特性写入数据。

    Structures of high voltage device and low voltage device, and method of manufacturing the same
    4.
    发明授权
    Structures of high voltage device and low voltage device, and method of manufacturing the same 失效
    高压器件和低压器件的结构及其制造方法

    公开(公告)号：US06887772B2

    公开(公告)日：2005-05-03

    申请号：US10721970

    申请日：2003-11-24

    申请人： Dae Woo Lee ,  Tae Moon Roh ,  Yil Suk Yang ,  Il Yong Park ,  Byoung Gon Yu ,  Jong Dae Kim

    发明人： Dae Woo Lee ,  Tae Moon Roh ,  Yil Suk Yang ,  Il Yong Park ,  Byoung Gon Yu ,  Jong Dae Kim

    IPC分类号： H05B33/00 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/12 ,  H01L21/20 ,  H01L21/76 ,  H01L21/8238

    CPC分类号： H01L21/823462 ,  H01L27/088 ,  H01L27/1203

    摘要： The present invention relates to structures of a high voltage device and a low voltage device formed on a SOI substrate and a method for manufacturing the same, and it is characterized in which the low voltage device region of silicon device regions in a SOI substrate is higher than the high voltage device region by steps, and a thickness of the silicon device region, where the high voltage device is formed, is equal to a junction depth of impurities of a source and drain in the low voltage device. Accordingly, silicon device regions in the SOI substrate are divided into the high voltage region and the low voltage region and steps are formed there between by oxidation growth method, so that the high voltage device having low junction capacitance can be made, and the low voltage device compatible with the conventional CMOS process and device characteristics can also be made at the same time.

    摘要翻译： 本发明涉及形成在SOI衬底上的高电压器件和低电压器件的结构及其制造方法，其特征在于SOI衬底中硅器件区域的低电压器件区域较高 比高压器件区域逐步，并且形成高压器件的硅器件​​区域的厚度等于低压器件中的源极和漏极的杂质的结深度。 因此，SOI衬底中的硅器件区域被分成高压区域和低电压区域，并且通过氧化生长方法在其间形成步骤，使得可以制造具有低结电容的高电压器件，并且低电压 与传统CMOS工艺兼容的器件和器件特性也可以同时进行。

    Semiconductor device having heat release structure using SOI substrate and fabrication method thereof
    6.
    发明授权
    Semiconductor device having heat release structure using SOI substrate and fabrication method thereof 有权
    具有使用SOI衬底的放热结构的半导体器件及其制造方法

    公开(公告)号：US06759714B2

    公开(公告)日：2004-07-06

    申请号：US10322232

    申请日：2002-12-17

    申请人： Sang Gi Kim ,  Dae Woo Lee ,  Tae Moon Roh ,  Yil Suk Yang ,  II-Young Park ,  Byoung-Gon Yu ,  Jong Dae Kim

    发明人： Sang Gi Kim ,  Dae Woo Lee ,  Tae Moon Roh ,  Yil Suk Yang ,  II-Young Park ,  Byoung-Gon Yu ,  Jong Dae Kim

    IPC分类号： H01L2972

    CPC分类号： H01L21/76289 ,  H01L21/84 ,  H01L23/367 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a semiconductor fabrication technology; and, more particularly, to a semiconductor device having a heat release structure that uses a silicon-on-insulator (SOI) substrate, and a method for fabricating the semiconductor device. The device and method of the present research provides a semiconductor device having a high heat-release structure and high heat-release structure, and a fabrication method thereof. In the research, the heat and high-frequency noises that are generated in the integrated circuit are released outside of the substrate through the tunneling region quickly by forming an integrated circuit on a silicon-on-insulator (SOI) substrate, aiid removing a buried insulation layer under the integrated circuit to form a tunneling region. The heat-release efficiency can be enhanced much more, when unevenness is formed on the surfaces of the upper and lower parts of the tunneling region, or when the air or other gases having excellent heat conductivity is flown into the tunneling region.

    摘要翻译： 提供半导体制造技术; 更具体地说，涉及具有使用绝缘体上硅（SOI）衬底的散热结构的半导体器件，以及制造半导体器件的方法。 本研究的装置和方法提供了具有高散热结构和高放热结构的半导体器件及其制造方法。 在研究中，通过在绝缘体上硅（SOI）衬底上形成集成电路，快速地通过隧道区域在衬底外部释放集成电路中产生的热和高频噪声，除去埋入 集成电路下的绝缘层形成隧道区。 当在隧道区域的上部和下部的表面上形成不均匀时，或者当具有优良导热性的空气或其它气体流入隧道区域时，可以进一步提高散热效率。

    Hall sensor signal generating device
    7.
    发明授权
    Hall sensor signal generating device 有权
    霍尔传感器信号发生装置

    公开(公告)号：US09175982B2

    公开(公告)日：2015-11-03

    申请号：US13586699

    申请日：2012-08-15

    申请人： Jung Hee Suk ,  Yil Suk Yang ,  Tae Moon Roh

    发明人： Jung Hee Suk ,  Yil Suk Yang ,  Tae Moon Roh

    IPC分类号： H02P6/06 ,  G01D5/14 ,  H02P6/16

    CPC分类号： G01D5/145 ,  H02P6/17

    摘要： Disclosed is a hall sensor signal generating device which includes a rotor which has a magnetic property and rotates on the basis of a rotary axis; a hall sensor unit which is disposed to be spaced apart from a stator disposed outside the rotor; and a clock synchronization unit which receives a driving clock, performs synchronization between the driving clock and a hall sensor signal output from the hall sensor unit, and outputs the synchronized driving clock and the synchronized hall sensor signal.

    摘要翻译： 公开了一种霍尔传感器信号发生装置，其包括具有磁性并基于旋转轴旋转的转子; 霍尔传感器单元，设置成与设置在转子外部的定子间隔开; 以及时钟同步单元，其接收驱动时钟，执行驱动时钟与从霍尔传感器单元输出的霍尔传感器信号之间的同步，并输出同步的驱动时钟和同步的霍尔传感器信号。

    Triangular wave generator and method generating triangular wave thereof
    9.
    发明授权
    Triangular wave generator and method generating triangular wave thereof 有权
    三角波发生器及其三角波产生方法

    公开(公告)号：US08604845B2

    公开(公告)日：2013-12-10

    申请号：US13488337

    申请日：2012-06-04

    申请人： Hui Dong Lee ,  Jaewon Nam ,  Young Kyun Cho ,  Jong-Kee Kwon ,  Yil Suk Yang ,  Jongdae Kim

    发明人： Hui Dong Lee ,  Jaewon Nam ,  Young Kyun Cho ,  Jong-Kee Kwon ,  Yil Suk Yang ,  Jongdae Kim

    IPC分类号： H03K4/06

    CPC分类号： H03K4/501

    摘要： Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.

    摘要翻译： 公开了一种三角波发生器，其包括方波信号生成单元，其被配置为响应于时钟信号的第一转换，经由输出端子输出从低电平转换到高电平的第一信号，并且将第一信号转换为 响应于复位信号从高电平的低电平; 电阻单元，被配置为调整所述方波信号的电压电平; 以及电容单元，被配置为接收电阻单元的输出信号，以产生从具有斜率的低电平上升到高电平的第二信号，以将复位信号提供给方波信号生成单元，并输出三角形 通过从具有斜率的高电平将第二信号降低到低电平来产生信号。

    Active piezoelectric energy harvester with embedded variable capacitance layer and method of manufacturing the same
    10.
    发明授权
    Active piezoelectric energy harvester with embedded variable capacitance layer and method of manufacturing the same 有权
    具有嵌入式可变电容层的有源压电能量收集器及其制造方法

    公开(公告)号：US08471439B2

    公开(公告)日：2013-06-25

    申请号：US12899499

    申请日：2010-10-06

    申请人： Seung Eon Moon ,  Sung Q Lee ,  Sang Kyun Lee ,  Yil Suk Yang ,  Kang Ho Park ,  Jong Dae Kim

    发明人： Seung Eon Moon ,  Sung Q Lee ,  Sang Kyun Lee ,  Yil Suk Yang ,  Kang Ho Park ,  Jong Dae Kim

    IPC分类号： H02N2/18

    CPC分类号： H02N2/186 ,  H01L41/1136 ,  H02N2/188 ,  Y10T29/42

    摘要： Provided is an active piezoelectric energy harvester, which can control a direct current voltage applied to an embedded variable capacitance layer to precisely adjust a resonance frequency in real time, and thus achieve a simpler structure and a smaller size compared to a conventional one that adjusts the resonance frequency using a separate variable capacitor provided outside. Further, the active piezoelectric energy harvester can precisely adjust the resonance frequency even when the frequency of vibration varies over time as in a real natural vibration environment or when it is degraded to undergo a variation in its own resonance frequency, and thus can continuously maintain optimal energy conversion characteristics.

    摘要翻译： 提供了一种有源压电能量收集器，其可以控制施加到嵌入式可变电容层的直流电压，以实时精确地调节谐振频率，从而实现比传统调节器的常规电路更简单的结构和更小的尺寸 谐振频率使用外部提供的单独的可变电容器。 此外，即使在真实的自然振动环境中，随着时间的推移，振动频率随时间而变化，或者当其自身的谐振频率变差而发生变化时，有源压电能量收集器也可以精确地调节谐振频率，从而可以持续保持最佳 能量转换特性。