公开(公告)号：US20080105921A1

公开(公告)日：2008-05-08

申请号：US12000593

申请日：2007-12-14

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US08088655B2

公开(公告)日：2012-01-03

申请号：US13081525

申请日：2011-04-07

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括依次层叠第一导电膜，第一绝缘膜和第二导电膜的层叠层，形成为与层叠层的侧面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US08399887B2

公开(公告)日：2013-03-19

申请号：US13336292

申请日：2011-12-23

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L27/108

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

公开(公告)号：US07923780B2

公开(公告)日：2011-04-12

申请号：US12000593

申请日：2007-12-14

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L27/12

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： The present invention provides a step in which a channel-length of a TFT can be controlled with higher reproducibility. In addition, the present invention provides a step in which a short channel-length of the TFT can be manufactured. Further, the present invention provides a structure of the TFT in which a current-voltage characteristic can be improved. The present invention refers to a thin film transistor comprising a lamination layer wherein a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covering the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, and a region which is in contact with the first insulating film and the third conductive film is a channel forming region in semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 本发明提供了可以以更高的再现性来控制TFT的沟道长度的步骤。 此外，本发明提供了可以制造TFT的短沟道长度的步骤。 此外，本发明提供了可以提高电流 - 电压特性的TFT的结构。 本发明涉及一种薄膜晶体管，其包括层叠层，其中依次层叠第一导电膜，第一绝缘膜和第二导电膜，形成为与层叠层的侧表面接触的半导体膜 以及通过第二绝缘膜覆盖半导体膜的第三导电膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US07314784B2

公开(公告)日：2008-01-01

申请号：US10803092

申请日：2004-03-18

申请人： Yoshiharu Hirakata ,  Yukie Nemoto

发明人： Yoshiharu Hirakata ,  Yukie Nemoto

IPC分类号： H01L21/00

CPC分类号： H01L29/786 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78696

摘要： A channel-length of a TFT can be controlled with higher reproducibility, and a short channel-length of the TFT can be manufactured. Further, a structure of the TFT having an improved current-voltage characteristic is provided. A thin film transistor has a lamination layer where a first conductive film, a first insulating film and a second conductive film are sequentially laminated, a semiconductor film is formed so as to be in contact with the side surface of the lamination layer, and a third conductive film covers the semiconductor film through a second insulating film. The first conductive film and the second conductive film are a source electrode and a drain electrode, a region which is in contact with the first insulating film and the third conductive film is a channel forming region in the semiconductor film, and the third conductive film is a gate electrode.

摘要翻译： 可以以更高的再现性来控制TFT的沟道长度，并且可以制造TFT的短沟道长度。 此外，提供了具有改善的电流 - 电压特性的TFT的结构。 薄膜晶体管具有层叠层，其中第一导电膜，第一绝缘膜和第二导电膜顺序地层叠，形成半导体膜以与层压层的侧表面接触，并且第三 导电膜通过第二绝缘膜覆盖半导体膜。 第一导电膜和第二导电膜是源电极和漏电极，与第一绝缘膜和第三导电膜接触的区域是半导体膜中的沟道形成区域，第三导电膜是 栅电极。

公开(公告)号：US09488882B2

公开(公告)日：2016-11-08

申请号：US13301848

申请日：2011-11-22

申请人： Yoshiharu Hirakata

发明人： Yoshiharu Hirakata

IPC分类号： G02F1/1343 ,  H04N13/04 ,  G02F1/1345 ,  G02B27/22 ,  G02F1/1337

CPC分类号： G02F1/134363 ,  G02B27/2264 ,  G02F1/133707 ,  G02F1/1345 ,  G02F2001/134318 ,  H04N13/341 ,  H04N2213/008

摘要： Provided is liquid crystal shutter glasses in which light leakage at the time when a liquid crystal shutter is closed is suppressed. The liquid crystal shutter glasses includes a first substrate and a second substrate with a liquid crystal layer containing a liquid crystal material exhibiting a blue phase provided therebetween, a first electrode with a comb shape and a first common electrode with a comb shape which are provided between the first substrate and the liquid crystal layer, and a second electrode with a comb shape and a second common electrode with a comb shape which are provided between the second substrate and the liquid crystal layer. The first electrode overlaps with the second electrode. The first common electrode overlaps with the second common electrode. The first electrode is connected to the second electrode.

摘要翻译： 提供了当液晶快门关闭时漏光的液晶快门眼镜被抑制。 液晶快门眼镜包括第一基板和具有液晶层的第二基板，液晶层包含设置在其间的蓝相的液晶材料，具有梳形的第一电极和梳状的第一公共电极， 第一基板和液晶层，以及设置在第二基板和液晶层之间的具有梳状的第二电极和梳状的第二公共电极。 第一电极与第二电极重叠。 第一公共电极与第二公共电极重叠。 第一电极连接到第二电极。

公开(公告)号：US09448433B2

公开(公告)日：2016-09-20

申请号：US12978770

申请日：2010-12-27

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Yoshiharu Hirakata

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Yoshiharu Hirakata

IPC分类号： G09G5/42 ,  G02F1/1335 ,  G09G3/34

CPC分类号： G09G3/3413 ,  G02F1/133345 ,  G02F1/1334 ,  G02F1/133514 ,  G02F1/133555 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2203/01 ,  G02F2203/04 ,  G09G3/2003 ,  G09G3/3406 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0237 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2320/0261 ,  G09G2320/064 ,  G09G2320/0646 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2330/022

摘要： An object is to provide a liquid crystal display device which can recognize image display even when the liquid crystal display device is used in a dim environment. In one pixel, a pixel electrode including both of a region where incident light through a liquid crystal layer is reflected and a transmissive region is provided, and image display can be performed in both modes: the reflective mode where external light is used as an illumination light source; and the transmissive mode where the backlight is used as an illumination light source. When there is external light with insufficient brightness, that is, in a dim environment, the backlight emits weak light and an image is displayed in the reflective mode, whereby image display can be performed.

摘要翻译： 本发明的目的是提供一种液晶显示装置，即使在液晶显示装置在昏暗的环境中使用时也能够识别图像显示。 在一个像素中，包括反射通过液晶层的入射光的区域和设置有透射区域的像素电极的像素电极，并且可以以两种模式执行图像显示：将外部光用作照明的反射模式 光源; 以及将背光用作照明光源的透射模式。 当存在亮度不足的外部光，即，在昏暗的环境中，背光发出弱光，并且以反射模式显示图像，由此可以执行图像显示。

公开(公告)号：US08854593B2

公开(公告)日：2014-10-07

申请号：US13278219

申请日：2011-10-21

申请人： Yoshiharu Hirakata ,  Takeshi Nishi ,  Shunpei Yamazaki

发明人： Yoshiharu Hirakata ,  Takeshi Nishi ,  Shunpei Yamazaki

IPC分类号： G02F1/1339 ,  H01L27/12 ,  G02F1/1345

CPC分类号： G02F1/13454 ,  G02F1/1339 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1248

摘要： In an active matrix semiconductor display device in which pixel TFTs and driver circuit TFT are formed on the same substrate in an integral manner, the cell gap is controlled by gap retaining members that are disposed between a pixel area and driver circuit areas. This makes it possible to provide a uniform cell thickness profile over the entire semiconductor display device. Further, since conventional grainy spacers are not used, stress is not imposed on the driver circuit TFTs when a TFT substrate and an opposed substrate are bonded together. This prevents the driver circuit TFTs from being damaged.

摘要翻译： 在其中像素TFT和驱动电路TFT以整体方式形成在同一基板上的有源矩阵半导体显示装置中，通过设置在像素区域和驱动电路区域之间的间隙保持构件来控制单元间隙。 这使得可以在整个半导体显示装置上提供均匀的电池厚度分布。 此外，由于不使用常规的颗粒状间隔物，当TFT基板和相对的基板接合在一起时，驱动电路TFT不施加应力。 这防止驱动电路TFT被损坏。

公开(公告)号：US08680593B2

公开(公告)日：2014-03-25

申请号：US13359515

申请日：2012-01-27

申请人： Yoshiharu Hirakata ,  Yuugo Goto ,  Yuko Kobayashi ,  Shunpei Yamazaki

发明人： Yoshiharu Hirakata ,  Yuugo Goto ,  Yuko Kobayashi ,  Shunpei Yamazaki

IPC分类号： H01L27/108 ,  H01L29/94

摘要： There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 μm or less, a height H is 0.5 μm to 10 μm, a diameter is 20 μm or less, and an angle α is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.

公开(公告)号：US08605010B2

公开(公告)日：2013-12-10

申请号：US13404616

申请日：2012-02-24

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Yoshiharu Hirakata

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Yoshiharu Hirakata

IPC分类号： G09G5/00

CPC分类号： G02B27/017 ,  G02B2027/0138 ,  G02B2027/014 ,  G06F3/011 ,  H04N13/344

摘要： There is provided an information processing apparatus which occupies a small space and which is capable of supplying image information having high definition and high resolution. An information processing apparatus of the invention employs a head mount display (HMD) utilizing compact flat panel displays as a display device for displaying information. The use of a head mount display as the display device of the information processing apparatus prevents any reduction in a work space. It also makes it possible to change the size of a virtual display screen freely. In addition, the information processing apparatus of the invention is capable of displaying a plurality of pieces of information on the virtual display screen at a time.

摘要翻译： 提供了一种信息处理设备，其占用较小的空间并且能够提供具有高清晰度和高分辨率的图像信息。 本发明的信息处理装置采用使用紧凑型平板显示器的头戴显示器（HMD）作为显示信息的显示装置。 使用头戴式显示器作为信息处理装置的显示装置防止工作空间的任何减少。 它还可以自由地更改虚拟显示屏的大小。 另外，本发明的信息处理装置能够一次在虚拟显示画面上显示多条信息。